BS62LV2005 Brilliance Semiconductor, BS62LV2005 Datasheet

BS62LV2005

Manufacturer Part Number

BS62LV2005

Description

Very Low Power/Voltage CMOS SRAM 256K X 8 bit

Manufacturer

Brilliance Semiconductor

Datasheet

1.BS62LV2005.pdf (10 pages)

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R0201-BS62LV2005

• Wide Vcc operation voltage : 4.5V ~ 5.5V

• Very low power consumption :

• High speed access time :

• Automatic power down when chip is deselected

• Three state outputs and TTL compatible

• Fully static operation

• Data retention supply voltage as low as 1.5V

• Easy expansion with CE2, CE1, and OE options

PRODUCT FAMILY

PIN CONFIGURATIONS

Brilliance Semiconductor Inc

FEATURES

BS62LV2005TC

BS62LV2005STC

BS62LV2005SC

BS62LV2005TI

BS62LV2005STI

BS62LV2005SI

Vcc = 5.0V

VCC

CE2

A11

A13

A15

A17

A16

A14

A12

-70

-55

PRODUCT

FAMILY

GND

DQ0

DQ1

DQ2

A17

A16

A14

A12

BSI

70ns(Max.) at Vcc = 5.0V

55ns(Max.) at Vcc = 5.0V

C-grade : 35mA (Max.) operating current

BS62LV2005TC

BS62LV2005STC

BS62LV2005TI

BS62LV2005STI

BS62LV2005SC

BS62LV2005SI

I- grade : 40mA (Max.) operating current

0.6uA (Typ.) CMOS standby current

-40

TEMPERATURE

OPERATING

Very Low Power/Voltage CMOS SRAM

256K X 8 bit

C to +70

C to +85

VCC

A15

CE2

A13

A11

A10

CE1

DQ7

DQ6

DQ5

DQ4

DQ3

A10

CE1

DQ7

DQ6

DQ5

DQ4

DQ3

GND

DQ2

DQ1

DQ0

. reserves the right to modify document contents without notice.

4.5V ~ 5.5V

RANGE

Vcc

Vcc=5.0V

SPEED

55 / 70

The BS62LV2005 is a high performance, very low power CMOS

Static Random Access Memory organized as 262,144 words by 8 bits

and operates from a wide range of 4.5V to 5.5V supply voltage.

Advanced CMOS technology and circuit techniques provide both high

speed and low power features with a typical CMOS standby current of

0.6uA and maximum access time of 55ns in 5V operation.

Easy memory expansion is provided by an active LOW chip

enable (CE1), an active HIGH chip enable (CE2), and active LOW

output enable (OE) and three-state output drivers.

The BS62LV2005 has an automatic power down feature, reducing the

power consumption significantly when chip is deselected.

The BS62LV2005 is available in the JEDEC standard 32 pin

450mil Plastic SOP, 8mmx13.4mm STSOP and 8mmx20mm TSOP.

(ns)

BLOCK DIAGRAM

DESCRIPTION

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

CE1

CE2

A15

A16

A14

A12

Vdd

Gnd

A13

A17

Address

Buffer

Input

STANDBY

CCSB1

Vcc=5.0V

Control

25uA

6uA

POWER DISSIPATION

, Max)

Output

Buffer

Data

Input

Data

Decoder

Row

Operating

1024

Vcc=5.0V

35mA

40mA

BS62LV2005

A11

, Max)

Address Input Buffer

Column Decoder

Memory Array

A8 A3 A2 A1

Sense Amp

Write Driver

Column I/O

1024 x 2048

2048

256

TSOP - 32

STSOP - 32

SOP - 32

TSOP - 32

STSOP - 32

SOP - 32

Revision 2.4

April 2002

PKG TYPE

A10

Related parts for BS62LV2005

BS62LV2005 Summary of contents

Page 1

... DQ3 Brilliance Semiconductor Inc R0201-BS62LV2005 DESCRIPTION The BS62LV2005 is a high performance, very low power CMOS Static Random Access Memory organized as 262,144 words by 8 bits and operates from a wide range of 4.5V to 5.5V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 0 ...

Page 2

... X (1) OPERATING RANGE RATING UNITS -0 Vcc+0.5 O -40 to +125 C O -60 to +150 C 1.0 W CAPACITANCE 20 mA SYMBOL 1. This parameter is guaranteed and not tested. 2 BS62LV2005 Function I/O OPERATION Vcc CURRENT High Z I High Z D OUT D IN AMBIENT RANGE TEMPERATURE O O Commercial +70 C Industrial -40 ...

Page 3

... V Vcc - 0. See Retention Waveform ( CE1 Controlled ) Data Retention Mode ≥ V 1.5V DR Vcc t CDR ≥ CE1 Vcc - 0. CE2 Controlled ) Data Retention Mode V 1.5V DR Vcc t CDR CE2 0. BS62LV2005 (1) MIN. TYP. MAX. -0.5 -- 0.8 Vcc=5.0V 2.2 -- Vcc+0.2 Vcc=5. 0.4 Vcc=5.0V 2.4 -- Vcc=5. Vcc=5. Vcc=5.0V -- 0.6 Vcc=5.0V MIN ...

Page 4

... Output Disable to Output Address Change 4 BS62LV2005 KEY TO SWITCHING WAVEFORMS WAVEFORM INPUTS MUST BE STEADY MAY CHANGE FROM MAY CHANGE FROM DON T CAR E: ANY CHANG E PERMITTED DOES NOT APPLY o C, Vcc = 5.0V ) BS62LV2005-55 BS62LV2005-70 MIN. TYP. MAX. MIN. TYP. MAX ...

Page 5

... The parameter is guaranteed but not 100% tested. R0201-BS62LV2005 R0201-BS62LV2005 ACS1 t ACS2 (5) t CLZ OLZ t ACS1 (5) t CLZ1 t ACS2 (5) t CLZ2 and CE2 IH. = 5pF as shown in Figure 1B BS62LV2005 CHZ1 CHZ2 t OH (5) t OHZ (1,5) t CHZ1 (2,5) t CHZ2 Revision 2.4 April 2002 ...

Page 6

... Data to Write Time Overlap Data Hold from Write Time Output Disable to Output in High Z End of Write to Output Active t WC (11 (5) ( (4,10) t OHZ 6 BS62LV2005 o C, Vcc = 5.0V ) BS62LV2005-55 BS62LV2005-70 MIN. TYP. MAX. MIN. TYP. MAX ...

Page 7

... CE1 going low or CE2 going high to the end of write. CW R0201-BS62LV2005 (5) ( (4,10) t WHZ ). IL ± 500mV from steady state with BS62LV2005 (11) (11 WR2 ( (8, 5pF as shown in Figure 1B. The (8) Revision 2.4 April 2002 ...

Page 8

... BSI ORDERING INFORMATION BS62LV2005 PACKAGE DIMENSIONS STSOP - 32 R0201-BS62LV2005 BS62LV2005 SPEED 70: 70ns 55: 55ns GRADE + - + PACKAGE T: TSOP (8mm x 20mm) ST: Small TSOP (8mm x 13.4mm) S: SOP Revision 2.4 April 2002 ...

Page 9

... BSI PACKAGE DIMENSIONS (continued) PACKAGE DIMENSIONS (continued) TSOP - 32 SOP -32 R0201-BS62LV2005 b WITH PLATING BASE METAL SECTION A-A 9 BS62LV2005 Revision 2.4 April 2002 ...

Page 10

... BSI REVISION HISTORY Revision Description 2.2 2001 Data Sheet release 2.3 Modify Standby Current (Typ. and Max.) 2.4 Modify some AC parameters. Modify 5V ICCSB1_Max(I-grade) from 10uA to 25uA. R0201-BS62LV2005 Date Apr. 15, 2001 Jun. 29, 2001 April,11,2002 10 BS62LV2005 Note Revision 2.4 April 2002 ...

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