BS62LV8005 Brilliance Semiconductor, BS62LV8005 Datasheet

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BS62LV8005

Manufacturer Part Number
BS62LV8005
Description
Very Low Power/Voltage CMOS SRAM 1M X 8 bit
Manufacturer
Brilliance Semiconductor
Datasheet
R0201-BS62LV8005
• Wide Vcc operation voltage : 4.5V ~ 5.5V
• Very low power consumption :
• High speed access time :
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE1, CE2 and OE options
Brilliance Semiconductor Inc
PIN CONFIGURATIONS
FEATURES
BS62LV8005EC
BS62LV8005BC
BS62LV8005EI
BS62LV8005BI
PRODUCT FAMILY
Vcc = 5V
-55
-70
A
B
C
D
E
F
G
H
GND
DQ0
DQ1
VCC
DQ2
DQ3
CE1
A19
A18
A17
A16
A15
NC
NC
NC
NC
WE
A4
A3
A2
A1
A0
PRODUCT
FAMILY
VCC
VSS
A18
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
1
48-Ball CSP top View
D0
D3
NC
NC
NC
BSI
55ns (Max) at Vcc = 5V
70ns (Max) at Vcc = 5V
BS62LV8005EC
BS62LV8005EI
OE
2
D2
NC
NC
A8
NC
NC
D1
C-grade: 45mA (Max.) operation current
I -grade: 50mA (Max.) operating current
3uA (Typ.) CMOS standby current
VCC
A17
A14
A12
3
A0
A3
A5
A9
A16
A15
A13
A10
-40
4
TEMPERATURE
A1
A4
A6
A7
+0
OPERATING
O
O
Very Low Power/Voltage CMOS SRAM
1M X 8 bit
C to +70
NC
WE
A11
C to +85
5
A2
CE1
D5
NC
D6
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
CE2
D4
VCC
VSS
NC
A19
6
NC
D7
A5
A6
A7
OE
CE2
A8
NC
NC
DQ7
DQ6
GND
VCC
DQ5
DQ4
NC
NC
A9
A10
A11
A12
A13
A14
O
O
C
C
. reserves the right to modify document contents without notice.
4.5V ~ 5.5V
4.5V ~ 5.5V
RANGE
Vcc
SPEED
Vcc=5V
55 / 70
55 / 70
( ns )
FUNCTIONAL BLOCK DIAGRAM
The BS62LV8005 is a high performance, very low power CMOS
Static Random Access Memory organized as 1,048,576 words by 8 bits
and operates from a wide range of 4.5V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current of
3uA and maximum access time of 55ns in 5V operation.
Easy memory expansion is provided by an active LOW chip
enable (CE1), an active HIGH chip enable(CE2) and active LOW output
enable (OE) and three-state output drivers.
The BS62LV8005 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS62LV8005 is available in 44 pin TSOP2 and 48-pin BGA type.
1
A13
A17
A15
A18
A16
A14
A12
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
GENERAL DESCRIPTION
CE1
Vdd
Gnd
CE2
A7
A6
A5
A4
WE
OE
Address
Buffer
Input
( I
STANDBY
8
Control
CCSB1
8
Vcc=5V
50uA
30uA
POWER DISSIPATION
, Max )
22
Output
Buffer
Buffer
Data
Input
Data
Decoder
Row
8
Operating
2048
( I
8
Vcc=5V
CC
45mA
50mA
A11A9 A8 A3 A2 A1 A0A10 A19
BS62LV8005
, Max )
Address Input Buffer
Column Decoder
Memory Array
2048 X 4096
Write Driver
Sense Amp
Column I/O
4096
512
18
BGA-48-0810
BGA-48-0810
TSOP2-44
TSOP2-44
PKG TYPE
Revision 2.4
April 2002

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BS62LV8005 Summary of contents

Page 1

... HIGH chip enable(CE2) and active LOW output enable (OE) and three-state output drivers. The BS62LV8005 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS62LV8005 is available in 44 pin TSOP2 and 48-pin BGA type. SPEED Vcc ( ns ) ...

Page 2

... (1) RATING UNITS with -0 Vcc+0.5 -40 to +125 -60 to +150 C 1 This parameter is guaranteed and not tested. 2 BS62LV8005 Function I/O OPERATION High Z High Z D OUT D IN OPERATING RANGE AMBIENT RANGE TEMPERATURE O O Commercial +70 C Industrial - +85 O ...

Page 3

... Vcc - 0. See Retention Waveform ( CE1 Controlled ) Data Retention Mode ≥ V 1.5V DR Vcc t CDR ≥ CE1 Vcc - 0. CE2 Controlled ) Data Retention Mode V 1.5V DR Vcc t CDR CE2 0. BS62LV8005 MIN. TYP. (1) MAX. -0.5 -- 0.8 Vcc=5V 2.2 -- Vcc+0.2 Vcc= 0.4 Vcc=5V 2.4 -- Vcc= Vcc= Vcc=5V ...

Page 4

... Output Disable to Output Address Change 4 BS62LV8005 KEY TO SWITCHING WAVEFORMS WAVEFORM INPUTS MUST BE STEADY MAY CHANGE FROM MAY CHANGE FROM DON T CAR E: ANY CHANG E PERMITTED DOES NOT APPLY Vcc = 5V ) BS62LV8005- 70 BS62LV8005- 55 MIN. TYP. MAX. MIN. TYP. MAX ...

Page 5

... The parameter is guaranteed but not 100% tested. R0201-BS62LV8005 ) ACS2 t ACS1 (5) t CLZ ACS2 t OLZ t ACS1 (5) t CLZ . and CE2 = 5pF as shown in Figure 1B BS62LV8005 t OH (5) t CHZ (5) OHZ (1,5) t CHZ Revision 2.4 April 2002 ...

Page 6

... Data to Write Time Overlap Data Hold from Write Time Output Disable to Output in High Z End ot Write to Output Active t WC (5) (11 ( (4,10) t OHZ 6 BS62LV8005 Vcc = 5.0V ) BS62LV8005-70 BS62LV8005-55 MIN. TYP. MAX. MIN. TYP. MAX ...

Page 7

... CE2 going high or CE1 going low to the end of write. CW R0201-BS62LV8005 ( (4,10) t WHZ ). IL ± 500mV from steady state with BS62LV8005 (11 ( (8, 5pF as shown in Figure 1B. (8) Revision 2.4 April 2002 ...

Page 8

... BSI ORDERING INFORMATION BS62LV8005 PACKAGE DIMENSIONS TSOP2-44 R0201-BS62LV8005 BS62LV8005 SPEED 55: 55ns 70: 70ns GRADE + - + PACKAGE E: TSOP2-44 B: BGA-48-0810 Revision 2.4 April 2002 ...

Page 9

... BSI PACKAGE DIMENSIONS (continued) SIDE VIEW D 0.1 D1 VIEW A 48 mini-BGA (8 x 10mm) R0201-BS62LV8005 NOTES: 1: CONTROLLING DIMENSIONS ARE IN MILLIMETERS. 2: PIN#1 DOT MARKING BY LASER OR PAD PRINT. 3: SYMBOL "N" IS THE NUMBER OF SOLDER BALLS 10.0 8.0 9 BS62LV8005 5.25 3.75 0.75 SOLDER BALL 0.35 0.05 Revision 2.4 April 2002 ...

Page 10

... BSI REVISION HISTORY Revision Description 2.2 2001 Data Sheet release 2.3 Modify Standby Current (Typ. and Max.) 2.4 Modify some AC parameters. R0201-BS62LV8005 Date Apr. 15, 2001 Jun. 29, 2001 April,11,2002 10 BS62LV8005 Note Revision 2.4 April 2002 ...

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