BS62LV8006 Brilliance, BS62LV8006 Datasheet

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BS62LV8006

Manufacturer Part Number
BS62LV8006
Description
Very Low Power/Voltage CMOS SRAM 1M X 8 bit
Manufacturer
Brilliance
Datasheet
R0201-BS62LV8006
• Vcc operation voltage : 4.5V ~ 5.5V
• Very low power consumption :
• High speed access time :
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE1, CE2 and OE options
BS62LV8006EC
BS62LV8006FC
BS62LV8006EI
BS62LV8006FI
PRODUCT FAMILY
PIN CONFIGURATIONS
Brilliance Semiconductor, Inc
FEATURES
Vcc = 5.0V C-grade: 75mA (@55ns) operating current
-55
-70
PRODUCT
FAMILY
GND
DQ0
DQ1
VCC
DQ2
DQ3
A
B
C
D
E
F
G
H
CE1
A19
A18
A17
A16
A15
NC
NC
NC
NC
WE
A4
A3
A2
A1
A0
BSI
55ns
70ns
A18
VSS
VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
1
NC
NC
NC
D0
D3
8.0uA (Typ.) CMOS standby current
C-grade: 60mA (@70ns) operating current
I -grade: 76mA (@55ns) operating current
I -grade: 61mA (@70ns) operating current
48-ball BGA top view
BS62LV8006EC
BS62LV8006EI
OE
2
NC
D2
A8
D1
NC
NC
NC
VCC
A17
A14
A12
A0
3
A3
A5
A9
TEMPERATURE
-40
+0
OPERATING
O
A16
A15
A13
A10
O
4
A1
A4
A6
A7
C to +70
C to +85
Very Low Power/Voltage CMOS SRAM
1M X 8 bit
A11
A2
CE1
D5
WE
5
NC
D6
NC
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
CE2
VCC
VSS
A19
6
NC
D4
NC
D7
O
O
C
C
A5
A6
A7
OE
CE2
A8
NC
NC
DQ7
DQ6
GND
VCC
DQ5
DQ4
NC
NC
A9
A10
A11
A12
A13
A14
. reserves the right to modify document contents without notice.
4.5V ~ 5.5V
4.5V ~ 5.5V
RANGE
Vcc
55ns : 4.5~5.5V
70ns : 4.5~5.5V
SPEED
55 / 70
55 / 70
( ns )
The BS62LV8006 is a high performance , very low power CMOS Static
Random Access Memory organized as 1,048,576 words by 8 bits and
operates from a range of 4.5V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current of
8.0uA at 5V/25
Easy memory expansion is provided by an active LOW chip enable (CE1)
, an active HIGH chip enable (CE2) and active LOW output enable (OE)
and three-state output drivers.
The BS62LV8006 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS62LV8006 is available in 48B BGA and 44L TSOP2 packages.
1
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTION
A13
A17
A15
A18
A16
A14
A12
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
CE1
Vdd
Gnd
CE2
A7
A6
A5
A4
WE
OE
Address
Buffer
Input
( I
STANDBY
o
CCSB1
Control
C and maximum access time of 55ns at 5.0V/85
8
Vcc=5V
8
110uA
55uA
POWER DISSIPATION
, Max )
22
Output
Buffer
Buffer
Data
Input
Data
Decoder
Row
Operating
8
( I
2048
Vcc=5V
8
CC
75mA
76mA
55ns
, Max )
A11A9 A8 A3 A2 A1 A0A10 A19
BS62LV8006
Address Input Buffer
Column Decoder
Memory Array
2048 X 4096
Write Driver
Sense Amp
Column I/O
4096
BGA-48-0912
TSOP2-44
TSOP2-44
BGA-48-0912
512
18
PKG TYPE
Revision 2.1
Jan.
o
C.
2004

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BS62LV8006 Summary of contents

Page 1

... BGA top view Brilliance Semiconductor, Inc R0201-BS62LV8006 GENERAL DESCRIPTION The BS62LV8006 is a high performance , very low power CMOS Static Random Access Memory organized as 1,048,576 words by 8 bits and operates from a range of 4.5V to 5.5V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 8 ...

Page 2

... RANGE -0 Vcc+0.5 Commercial O -40 to +85 C Industrial O -60 to +150 C 1.0 W CAPACITANCE 20 mA SYMBOL This parameter is guaranteed and not 100% tested. 2 BS62LV8006 Function I/O OPERATION Vcc CURRENT High CCSB High OUT AMBIENT TEMPERATURE + ...

Page 3

... Read Cycle Time RC ( CE1 Controlled ) Data Retention Mode ≥ V 1.5V DR Vcc t CDR ≥ CE1 Vcc - 0. CE2 Controlled ) Data Retention Mode V ≧ 1.5V DR Vcc t CDR CE2 ≦ 0. BS62LV8006 C ) (1) MIN. TYP. -0.5 -- Vcc=5V 2.2 -- Vcc= Vcc=5V 2.4 -- Vcc= 55ns Vcc= 70ns = 0mA ...

Page 4

... CYCLE TIME : 70ns DESCRIPTION MIN (CE1) -- (CE2 BS62LV8006 KEY TO SWITCHING WAVEFORMS INPUTS OUTPUTS MUST BE MUST BE STEADY STEADY MAY CHANGE WILL BE FROM CHANGE FROM MAY CHANGE WILL BE FROM CHANGE FROM DON T CARE: CHANGE : ...

Page 5

... The parameter is guaranteed but not 100% tested. R0201-BS62LV8006 ) ACS2 t ACS1 (5) t CLZ ACS2 t OLZ t ACS1 (5) t CLZ . and CE2 = BS62LV8006 t OH (5) t CHZ t OH (5) t OHZ (1,5) t CHZ Revision 2.1 Jan. 2004 ...

Page 6

... Data to Write Time Overlap Data Hold from Write Time Output Disable to Output in High Z End of Write to Output Active t WC (5) (11 ( (2) AS (4,10) t OHZ 6 BS62LV8006 CYCLE TIME : 70ns CYCLE TIME : 55ns (Vcc=4.5~5.5V) (Vcc=4.5~5.5V) MIN. TYP. MAX. MIN. TYP. MAX ...

Page 7

... The parameter is guaranteed but not 100% tested. 11 measured from the later of CE2 going high or CE1 going low to the end of write. CW R0201-BS62LV8006 t WC ( (4,10) t WHZ ). IL 7 BS62LV8006 (7) ( (8,9) DH Revision 2.1 Jan. 2004 ...

Page 8

... BSI ORDERING INFORMATION BS62LV8006 X X Note: BSI (Brilliance Semiconductor Inc.) assumes no responsibility for the application or use of any product or circuit described herein. BSI does not authorize its products for use as critical components in any application in which the failure of the BSI product may be expected to result in significant injury or death, including life-support systems and critical medical instruments ...

Page 9

... BSI PACKAGE DIMENSIONS (continued) SIDE VIEW D 0.1 D1 3.375 VIEW A 48 mini-BGA (9mm x 12mm) R0201-BS62LV8006 BS62LV8006 NOTES: 1: CONTROLLING DIMENSIONS ARE IN MILLIMETERS. 2: PIN#1 DOT MARKING BY LASER OR PAD PRINT. 3: SYMBOL "N" IS THE NUMBER OF SOLDER BALLS 12.0 9.0 5.25 3.75 SOLDER BALL 0.35±0. 0.75 Revision 2.1 Jan ...

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