HA4-5137883 Intersil Corporation, HA4-5137883 Datasheet - Page 8

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HA4-5137883

Manufacturer Part Number
HA4-5137883
Description
60MHz/ Ultra Low Noise/ Precision Operational Amplifier
Manufacturer
Intersil Corporation
Datasheet
j
E1
x 45
Ceramic Leadless Chip Carrier Packages (CLCC)
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.
Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reli-
able. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may
result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
B
h x 45
E2
o
-E-
e
-F-
1
A
o
L
0.010
S
L2
E H
S
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
0.007
D3
D
D1
B1
M
-H-
D2
B2
E F
e
S H S
A1
L3
E3
0.010
PLANE 2
PLANE 1
B3
L1
E
S
HA-5137/883
E F
S
8
J20.A
20 PAD CERAMIC LEADLESS CHIP CARRIER PACKAGE
NOTES:
SYMBOL
1. Metallized castellations shall be connected to plane 1 terminals
2. Unless otherwise specified, a minimum clearance of 0.015 inch
3. Symbol “N” is the maximum number of terminals. Symbols “ND”
4. The required plane 1 terminals and optional plane 2 terminals (if
5. The corner shape (square, notch, radius, etc.) may vary at the
6. Chip carriers shall be constructed of a minimum of two ceramic
7. Dimension “A” controls the overall package thickness. The maxi-
8. Dimensioning and tolerancing per ANSI Y14.5M-1982.
9. Controlling dimension: INCH.
ND
NE
A1
B1
B2
B3
D1
D2
D3
E1
E2
E3
and extend toward plane 2 across at least two layers of ceramic
or completely across all of the ceramic layers to make electrical
connection with the optional plane 2 terminals.
(0.38mm) shall be maintained between all metallized features
(e.g., lid, castellations, terminals, thermal pads, etc.)
and “NE” are the number of terminals along the sides of length
“D” and “E”, respectively.
used) shall be electrically connected.
manufacturer’s option, from that shown on the drawing.
layers.
mum “A” dimension is package height before being solder dipped.
e1
L1
L2
L3
A
B
D
E
N
e
h
L
j
MIL-STD-1835 CQCC1-N20 (C-2)
0.060
0.050
0.022
0.006
0.342
0.342
0.015
0.045
0.045
0.075
0.003
MIN
-
-
-
0.072 REF
0.200 BSC
0.100 BSC
0.200 BSC
0.100 BSC
0.050 BSC
0.040 REF
0.020 REF
INCHES
20
5
5
0.100
0.088
0.028
0.022
0.358
0.358
0.358
0.358
0.055
0.055
0.095
0.015
MAX
-
-
Spec Number
1.52
1.27
0.56
0.15
8.69
8.69
0.38
1.14
1.14
1.91
0.08
MIN
MILLIMETERS
-
-
-
1.83 REF
5.08 BSC
2.54 BSC
5.08 BSC
2.54 BSC
1.27 BSC
1.02 REF
0.51 REF
20
5
5
2.54
2.23
0.71
0.56
9.09
9.09
9.09
9.09
1.40
1.40
2.41
0.38
MAX
-
-
Rev. 0 5/18/94
511034-883
NOTES
6, 7
2, 4
2
2
2
5
5
3
3
3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-

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