AM79C873 Advanced Micro Devices, AM79C873 Datasheet - Page 29

• Manufacturer Part Number: AM79C873
• Description: NetPHY -1 10/100 Mbps Ethernet Physical Layer Single-Chip Transceiver with 100BASE-FX Support
• Manufacturer: Advanced Micro Devices

AMD Specified Configuration and Status
Register (DSCSR) - Register 17
17.8-17.4
17.3-17.0
17.11-
17.15
17.14
17.13
17.12
17.10
Bit
Bit
PHYAD[4:0]
ANMB[3:0]
Bit Name
Bit Name
Reserved
100HDX
100FDX
10HDX
10FDX
(PHYAD), RW
Default
Default
0, RW
0, RO
1, RO
1, RO
1, RO
1, RO
P R E L I M I N A R Y
Auto-Negotiation Monitor Bits:
These bits are for debug only. The Auto-Negotiation status will be written
to these bits.
100 M Full Duplex Operation:
After Auto-Negotiation is completed, the results will be written to this bit.
A 1 in this bit position indicates 10 0M Full Duplex operation. The software
can read bits [15:12] to determine which mode is selected after Auto-
Negotiation. This bit is invalid when Auto-Negotiation is disabled.
100 M Half Duplex Operation:
After Auto-Negotiation is completed, the results will be written to this bit.
A 1 in this bit position indicates 100 M Half Duplex operation. The software
can read bits [15:12] to determine which mode is selected after Auto-
Negotiation. This bit is invalid when Auto-Negotiation is disabled.
10 M Full Duplex Operation:
After Auto-Negotiation is completed, the results will be written to this bit.
A 1 in this bit position indicates 10 M Full Duplex operation. The software
can read bits [15:12] to determine which mode is selected after Auto-
Negotiation. This bit is invalid when Auto-Negotiation is disabled.
10 M Half Duplex Operation:
After Auto-Negotiation is completed, the results will be written to this bit.
A 1 in this bit position indicates 10M Half Duplex operation. The software
can read bits [15:12] to determine which mode is selected after Auto-
Negotiation. This bit is invalid when Auto-Negotiation is disabled.
Reserved:
Write as 0, ignore on read.
PHY Address Bit 4:0:
The values of the PHYAD[4:0] pins are latched to this register at power-
up/reset. The first PHY address bit transmitted or received is the MSB (bit
4). A station management entity connected to multiple PHY entities must
know the appropriate address of each PHY. A PHY address of <00000>
will cause the isolate bit of the BMCR (bit 10, Register Address 00) to be
set.
b3
0
0
0
0
0
0
0
0
1
Am79C873
b2
0
0
0
0
1
1
1
1
0
b1
0
0
1
1
0
0
1
1
0
b0
0
1
0
1
0
1
0
1
0
In IDLE state
Ability match
Acknowledge match
Acknowledge match fail
Consistency match
Consistency match fail
Parallel detect signal_link_ready
Parallel detect signal_link_ready fail
Auto-Negotiation completed successfully
Description
Description
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