HIP0060AB Intersil Corporation, HIP0060AB Datasheet

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HIP0060AB

Manufacturer Part Number
HIP0060AB
Description
1.5A/ 50V Quad Low Side Power Driver with Serial Bus Control and Fault Protection
Manufacturer
Intersil Corporation
Datasheet

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Part Number:
HIP0060AB
Manufacturer:
INTERSIL
Quantity:
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July 1997
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
Features
• Quad NDMOS Output Drivers in a High Voltage Power
• Over-Stress Protection - Each Output
• Low Quiescent Current . . . . . . . . . . . . . . . . 10mA Max
• Serial Diagnostic Link with SPI Bus
• Diagnostic Interrupt Fault Flag
• 5V CMOS Logic Input Control
• Common Reset for Fault Bits and Output Drivers
• Ambient Operating
Applications
• Automotive and Industrial Systems
• Fuel Injection Drivers
• Solenoids, Relays and Lamp Drivers
• Logic and P Controlled Drivers
• Robotic Controls
Pinout
OUTB
OUTA
BiMOS Process
- Over-Current Limiting . . . . . . . . . . . . . . . . . .1.5A Min
- Internal Zener Drain-to-Gate Over-Voltage Clamp
- Thermal Shutdown Protection
- Open-Load Detection
Temperature Range. . . . . . . . . . . . . . . . -40
GND
GND
GND
GND
GND
INA
INB
INT
CS
Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50V Typ
SI
10
11
12
1
2
3
4
5
6
7
8
9
HIP0060 (SOIC)
TOP VIEW
24
23
22
21
20
19
18
17
16
15
14
13
|
V
RST
IND
OUTD
GND
GND
GND
GND
OUTC
INC
SO
SCK
Copyright
DD
©
Block Diagram
Intersil Corporation 1999
SCK
RST
V
INA
SO
CS
DD
SI
o
C to 125
CHANNEL A
(1 OF 4)
with Serial Bus Control and Fault Protection
+5V
8-BIT SPI
(SERIAL
DIAG.
REG)
o
C
B, C, D
1
+
1.5A, 50V Quad Low Side Power Driver
TO
Description
The HIP0060 is a 5V logic controlled Quad Low Side Power
Driver. The outputs are individually protected for over-current
(OC), over-temperature (OT) and over-voltage (OV). If an OC
short circuit in the output load is sensed (I
power driver, that output current will be independently limited
while the other outputs remain in operation. Over-current is
limited by direct gate feedback. Over-voltage protection is pro-
vided by a drain-to-gate zener diode that clamps inductive
switching pulses.
The output drivers are individually controlled through a Gate
Control Latch. Temperature is sensed at each output. If a ther-
mal fault exists, a status flag is set and the output is latched
off. Open-load (OL) and over-temperature (OT) faults sets a
status flag bit as diagnostic output to the SPI bus. For all fault
bits (8), an ORed one-shot interrupt signal is output to the INT
pin. An RST reset clears the fault flags and disables all out-
puts while active. The Serial Peripheral Interface (SPI) bus
pins are the Serial Input (SI), Serial Output (SO), Serial Data
Clock (SCK) and the Chip Select (CS).
The HIP0060 is fabricated in a Power BiMOS IC process, and
is intended for use in automotive and other applications having
a wide range of temperature and electrical stress conditions. It
is particularly suited for driving lamps, relays, and solenoids in
applications where low operating power, high breakdown volt-
age, and higher output current at high temperatures is required.
Ordering Information
HIP0060AB
CONTROL
PART NUMBER
LATCH
GATE
2
2
2
O.T.
BIT
FROM B, C, D
2
OPEN LOAD
DETECTOR
2
O.L.
RANGE (
BIT
-40 to 125
HIP0060
TEMP.
2
CURRENT
8 ORed O.T./O.L.
MULTI OUTPUT
FAULT INPUTS,
o
OVER
LIMIT
ONE-SHOT
C)
24 Ld SOIC
OVER TEMP.
DETECTOR
PACKAGE
I
S
File Number
S
) in one output
M24.3
INT
PKG.
OUTA
NO.
4045

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HIP0060AB Summary of contents

Page 1

... It is particularly suited for driving lamps, relays, and solenoids in applications where low operating power, high breakdown volt- age, and higher output current at high temperatures is required. Ordering Information PART NUMBER HIP0060AB Block Diagram CHANNEL ...

Page 2

Absolute Maximum Ratings Max Output Voltage, V (Note OUT Max Output Load Current, I (Per Output, Note ...

Page 3

Electrical Specifications V = 4.5V to 5.5V PARAMETER SYMBOL DIAGNOSTIC Pulse Width, INT t INT Fault Response Time t FAULT OVER-TEMPERATURE PROTECTION Over-Temperature Shutdown T SD SERIAL PERIPHERAL INTERFACE TIMING (Capacitance Each Pin, C SCK Period t CYC ...

Page 4

Serial Diagnostic Link A serial diagnostic link via the SPI bus provides the means to clock fault data in and out of the fault register to the micro- controller. When the microcontroller receives an INT inter- rupt signal, data is ...

Page 5

DUTY CYCLE FUNCTION GEN 14.5V V OUT 0V FIGURE 2. INPUT TO OUTPUT SWITCHING TIME DIAGRAM FOR EACH SWITCHING CHANNEL. THE CONDITIONS SHOWN REFER TO THE TIMING TEST CIRCUIT 10000 ...

Page 6

Timing Diagrams CS SCK (CPOL = 0, CPHA = 1) CS SCK SI SO (THREE-STATE) FIGURE 5. BYTE TIMING DIAGRAM WITH ASYNCHRONOUS RESET. REFER TO THE ELECTRICAL SPECIFICATION FOR THE HIGH AND LOW INPUT AND OUTPUT THRESHOLD LEVELS SHOWN FOR ...

Page 7

... All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...

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