K9F1208D0B Samsung semiconductor, K9F1208D0B Datasheet - Page 20
K9F1208D0B
Manufacturer Part Number
K9F1208D0B
Description
64M x 8 Bit NAND Flash Memory
Manufacturer
Samsung semiconductor
Datasheet
1.K9F1208D0B.pdf
(45 pages)
- Current page: 20 of 45
- Download datasheet (2Mb)
K9F1208R0B
K9F1208B0B
K9F1208U0B
Figure 8. Read Operation with CE don’t-care.
System Interface Using CE don’t-care.
For an easier system interface, CE may be inactive during the data-loading or sequential data-reading as shown below. The internal
528byte page registers are utilized as separate buffers for this operation and the system design gets more flexible. In addition, for
voice or audio applications which use slow cycle time on the order of u-seconds, de-activating CE during the data-loading and reading
would provide significant savings in power consumption.
Figure 7. Program Operation with CE don’t-care.
CLE
CE
WE
ALE
I/O
CE
WE
CLE
ALE
R/B
I/O
CE
WE
RE
X
X
t
CS
00h
80h
Start Add.(4Cycle)
Start Add.(4Cycle)
t
WP
On K9F1208X0B-Y,P or K9F1208X0B-V,F
CE must be held
low during tR
t
CH
t
R
Data Input
20
I/O
CE
RE
X
CE don’t-care
t
CE don’t-care
Data Output(sequential)
CEA
t
REA
FLASH MEMORY
Data Input
out
Preliminary
10h
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