CDP1883 Intersil Corporation, CDP1883 Datasheet - Page 5

• Manufacturer Part Number: CDP1883
• Description: CMOS 7-Bit Latch and Decoder Memory Interfaces
• Manufacturer: Intersil Corporation

Dynamic Electrical Specifications
NOTES:
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notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
CLOCK to Address
Memory Address to Chip Select
Memory Address to Address
1. Typical values are for T
2. Maximum limits of minimum characteristics are the values above which all devices function.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
CS0, CS1, CS2, CS3
CS0, CS1, CS2, CS3
PARAMETER
MA0 - MA5
A8 - A12
A
CLOCK
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= 25
CE
o
C.
t
CLCL
(A) CHIP ENABLE TO CHIP SELECT PROPAGATION DELAY
(B) MEMORY ADDRESS SETUP AND HOLD TIME
t
t
MACL
MACS
t
t
MAA
CLA
T
FIGURE 1. CDP1883 TIMING WAVEFORMS
See Figure 1 (Continued)
A
= -40
t
CLA
CDP1883, CDP1883C
o
C to +85
V
(V)
10
10
10
DD
5
5
5
t
CLCS
t
CLMA
o
t
VALID CHIP ENABLE
CECS
C, V
4-133
MIN
-
-
-
-
-
-
DD
(NOTE 1)
5%, t
CDP1883
TYP
100
100
65
75
80
40
R
, t
t
MACS
F
= 20ns, V
(NOTE 2)
MAX
175
125
175
125
125
60
t
CECS
t
IH
MAA
= 0.7 V
MIN
-
-
-
-
-
-
DD
t
MAA
CDP1883C
(NOTE 1)
, V
TYP
100
100
80
IL
-
-
-
= 0.3 V
t
MACS
(NOTE 2)
DD
MAX
175
175
125
-
-
-
, C
L
= 100pF.
UNITS
ns
ns
ns
ns
ns
ns