AS7C251MPFS32A ALSC [Alliance Semiconductor Corporation], AS7C251MPFS32A Datasheet
AS7C251MPFS32A
Related parts for AS7C251MPFS32A
AS7C251MPFS32A Summary of contents
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... Byte write registers CLK D Q Enable CE register CLK CLK D Q Enable Power delay down register CLK -200 5 200 3.1 450 170 90 Alliance Semiconductor AS7C251MPFS32A AS7C251MPFS36A 1M × 32/36 Memory array 32/36 32/ Output Input registers registers CLK 32/36 DQ[a:d] -166 -133 6 7.5 166 133 3.5 3.8 400 350 150 140 ...
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... PL-SCD PL-SCD PL-SCD PL-DCD PL-DCD PL-DCD NTD-PL NTD-PL NTD-PL NTD-FT NTD-FT NTD- Alliance Semiconductor AS7C251MPFS32A AS7C251MPFS36A Speed 200/166/133 MHz 200/166/133 MHz 200/166/133 MHz 200/166/133 MHz 200/166/133 MHz 200/166/133 MHz 7.5/8.5/10 ns 7.5/8.5/10 ns 7.5/8.5/10 ns 200/166/133 MHz 200/166/133 MHz 200/166/133 MHz 7.5/8.5/10 ns 7.5/8.5/10 ns 7.5/8.5/ ...
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... DQd5 V 26 SSQ V 27 DDQ 28 DQd6 29 DQd7 30 NC/DQPd Note: For pins 1, 30, 51, and 80, NC applies to the x32 configuration. DQPn applies to the x36 configuration. 2/14/05, v.1.3 ® TQFP 14 x 20mm Alliance Semiconductor AS7C251MPFS32A AS7C251MPFS36A 80 DQPb/NC 79 DQb7 78 DQb6 77 V DDQ 76 V SSQ 75 DQb5 DQb4 74 73 ...
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... ADSP must be sampled high when ADSC is sampled low to initiate a cycle with ADSC. WE signals are sampled on the clock edge that samples ADSC low (and ADSP high). Master chip enable CE0 blocks ADSP, but not ADSC. The AS7C251MPFS32A/36A family operates from a core 2.5V power supply. These devices are available in a 100-pin TQFP package. TQFP capacitance ...
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... DESELECT or READ cycle should be given while the SRAM is transitioning out of SNOOZE MODE. PUS 2/14/05, v.1.3 ® or left floating, device follows interleaved Burst order. When DD is guaranteed after the time t is met. After entering SNOOZE MODE, all inputs except ZZ is SB2 ZZI Alliance Semiconductor AS7C251MPFS32A AS7C251MPFS36A Description . The duration of SB2 ...
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... High Starting Address First Increment Second Increment Third Increment Alliance Semiconductor AS7C251MPFS32A AS7C251MPFS36A Linear burst address (LBO = ...
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... Alliance Semiconductor AS7C251MPFS32A AS7C251MPFS36A CLK Operation Deselect Deselect Deselect Deselect Deselect External Begin read External Begin read ...
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... DD DDQ V –0 –0 – – OUT T –65 stg T –65 bias Symbol Min V 2.375 DD V 2.375 DDQ Vss 0 Alliance Semiconductor AS7C251MPFS32A AS7C251MPFS36A Max Unit +3 0 0.3 V DDQ 1 +150 C o +135 C Nominal Max Unit 2.5 2.625 V 2.5 2.625 ...
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... All V – 0.2V, Deselected < Max Deselected < 0.2V, I SB1 ≤ 0.2V or ≥ V all ≥ V Deselected Max I SB2 ≤ ≥ V all Alliance Semiconductor AS7C251MPFS32A AS7C251MPFS36A Min Max -2 2 < OUT DDQ * 1 1.7 V DDQ ** -0.3 0.7 ** -0.3 0.7 1.7 – ...
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... ADSCS t 0.4 – 0.5 ADVH t 0.4 – 0.5 ADSPH t 0.4 – 0.5 ADSCH Conditions Symbol ZZ > SB2 t PDS t PUS t ZZI t RZZI Alliance Semiconductor AS7C251MPFS32A AS7C251MPFS36A -133 Max Min Max Unit Notes 166 – 133 MHz – 7.5 – ns 3.5 – 3.8 ns 3.5 – 3.8 ns – 0 – ns 2,3,4 – 1.5 – – ...
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... ADV inserts wait states HZOE t OH Q(A2) Q(A2Ý01) Q(A2Ý10) Read Burst Burst Suspend Burst Q(A2) Read Read Read Read Q(A 2Ý01 ) Q(A 2Ý10 ) Q(A 2Ý10 ) Q(A 2Ý11 ) Alliance Semiconductor AS7C251MPFS32A AS7C251MPFS36A Undefined A3 t HZC Q(A2Ý11) Q(A3) Q(A3Ý01) Q(A3Ý10) Read Burst Burst Burst Q(A3) Read Read Read DSEL Q(A 3Ý01 ) Q(A 3Ý10 ) Q(A 3Ý ...
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... CL ADSC LOADS NEW ADDRESS A2 ADV SUSPENDS BURST D(A2) D(A2Ý01) D(A2Ý01) D(A2Ý10) ADV Suspend Read Suspend Burst Write Q(A2) Write Write D D(A 2Ý01 ) D(A 2Ý01 ) D(A 2Ý10 ) Alliance Semiconductor AS7C251MPFS32A AS7C251MPFS36A t t ADSCS ADSCH ADVH ADVS D(A2Ý11) D(A3) D(A3Ý01) D(A3Ý10) ADV ...
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... ADVH ADVS D(A2 HZOE LZOE t LZC Q(A1) Suspend Read Suspend Read Read Q(A2) Write Q(A3) Q(A1) D Alliance Semiconductor AS7C251MPFS32A AS7C251MPFS36A Q(A3) Q(A3Ý01) Q(A3Ý10) Q(A3Ý11) ADV ADV ADV Burst Burst Burst Read Read Read Q(A 3Ý01 ) Q(A 3Ý10 ) Q(A 3Ý ...
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... CSS CSH CE0,CE2 CE1 ADV LZOE Q(A1) Dout Din READ READ Q(A1) Q(A2) 2/14/05, v.1.3 ® t CYC HZOE Q(A2) Q(A3) Q(A4 D(A5) D(A6) READ READ WRITE Q(A3) Q(A4) D(A5) Alliance Semiconductor AS7C251MPFS32A AS7C251MPFS36A LZOE Q(A8 D(A7) READ WRITE WRITE READ Q(A9) D(A7) D(A6) Q(A8 Q(A9 ...
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... ZZ I supply S READ USPEND READ Q(A1) Q(A1) 2/14/05, v.1.3 ® HZC t PUS t PDS ZZ Recovery Cycle ZZ Setup Cycle t ZZI t RZZI I SB2 Sleep State Alliance Semiconductor AS7C251MPFS32A AS7C251MPFS36A t CYC D(A2) t HZOE D(A2(Ý01)) Normal Operation Mode READ USPEND Q(A2) WRITE TINUE D(A2) WRITE D( Ý01) ...
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... DDQ OUT 30 pF* Figure B: Output load (A) at any given temperature and voltage. LZC is measured as low if below VIL. CL Alliance Semiconductor AS7C251MPFS32A AS7C251MPFS36A Thevenin equivalent: +2.5V 319Ω/1667Ω D OUT /2 5 pF* 353Ω/1538Ω GND *including scope and jig capacitance ...
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... Package dimensions 100-pin quad flat pack (TQFP) TQFP Min Max A1 0.05 0.15 A2 1.35 1.45 b 0.22 0.38 c 0.09 0.20 D 13.90 14.10 E 19.90 20.10 e 0.65 nominal Hd 15.85 16.15 He 21.80 22.20 L 0.45 0.75 L1 1.00 nominal α 0° 7° Dimensions in millimeters 2/14/05, v.1.3 ® Alliance Semiconductor AS7C251MPFS32A AS7C251MPFS36A α ...
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... Ordering information Package & Width 200 MHz AS7C251MPFS32A-200TQC TQFP x32 AS7C251MPFS32A-200TQI AS7C251MPFS36A-200TQC TQFP x36 AS7C251MPFS36A-200TQI Note: Add suffix ‘N’ to the above part numbers for lead free parts (Ex AS7C251MPFS32A-200TQC Part numbering guide AS7C Alliance Semiconductor SRAM prefix 2. Operating voltage 2.5V 3 ...
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... Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. AS7C251MPFS32A AS7C251MPFS36A ® Copyright © Alliance Semiconductor All Rights Reserved Part Number: AS7C251MPFS32A / AS7C251MPFS36A Document Version: v.1.3 ...