ADIS16003PCB AD [Analog Devices], ADIS16003PCB Datasheet - Page 4

• Manufacturer Part Number: ADIS16003PCB
• Manufacturer: AD [Analog Devices]

ADIS16003
TIMING SPECIFICATIONS
T
Table 2.
Parameter
f
t
t
t
t
t
t
t
t
t
t
t
1
2
3
4
5
SCLK
CONVERT
ACQ
1
2
3
4
5
6
7
8
9
Guaranteed by design. All input signals are specified with tr and tf = 5 ns (10% to 90% of V
from 3.0 V to 3.6 V. The 5 V operating range spans from 4.75 V to 5.25 V.
See Figure 3 and Figure 4.
Mark/space ratio for the SCLK input is 40/60 to 60/40.
Measured with the load circuit in Figure 2 and defined as the time required for the output to cross 0.4 V or 2.0 V with V
2.4 V with V
t
back to remove the effects of charging or discharging the 50 pF capacitor. This means that the time, t
time of the part and is independent of the bus loading.
A
4
4
5
8
is derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit in Figure 2. The measured number is then extrapolated
= –40°C to +125°C, acceleration = 0 g, unless otherwise noted.
3
CC
1, 2
= 5.0 V.
V
10
2
14.5 t
1.5 t
10
60
100
20
20
0.4 × t
0.4 × t
80
5
CC
= 3.3
SCLK
SCLK
SCLK
SCLK
V
10
2
14.5 t
1.5 t
10
30
75
20
20
0.4 x t
0.4 x t
80
5
CC
= 5
SCLK
CSLK
SCLK
SCLK
Unit
kHz min
MHz max
ns min
ns max
ns max
ns min
ns min
ns min
ns min
ns max
μs typ
Rev. 0 | Page 4 of 16
Description
Throughput time = t
TCS/CS to SCLK setup time
Delay from TCS/CS until DOUT three-state disabled
Data access time after SCLK falling edge
Data setup time prior to SCLK rising edge
Data hold time after SCLK rising edge
SCLK high pulse width
SCLK low pulse width
TCS/CS rising edge to DOUT high impedance
Power-up time from shutdown
CC
) and timed from a voltage level of 1.6 V. The 3.3 V operating range spans
8
, quoted in the timing characteristics is the true bus relinquish
CONVERT
+ t
CC
ACQ
= 3.3 V and time for an output to cross 0.8 V or
= 16 t
SCLK