EVAL-AD7324CB AD [Analog Devices], EVAL-AD7324CB Datasheet - Page 30

• Manufacturer Part Number: EVAL-AD7324CB
• Description: 4-Channel, Software-Selectable, True Bipolar Input, 12-Bit Plus Sign ADC
• Manufacturer: AD [Analog Devices]

AD7324
AUTOSHUTDOWN MODE
(PM1 = 1, PM0 = 0)
Once the autoshutdown mode is selected, the AD7324 auto-
matically enters shutdown on the 15
autoshutdown mode, all internal circuitry is powered down. The
AD7324 retains information in the registers during autoshutdown.
The track-and-hold is in hold mode during autoshutdown. On
the rising
shutdown, returns to track as the AD7324 begins to power up.
The power-up from autoshutdown is 500 μs.
When the control register is programmed to transition to
autoshutdown mode, it does so on the 15
Figure 48 shows the part entering autoshutdown mode. Once in
autoshutdown mode, the
part in autoshutdown mode. The AD7324 automatically begins to
power up on the CS
is required before a valid conversion, initiated by bringing the
CS
complete, the AD7324 powers down again on the 15
rising edge. The CS signal must remain low again to keep the
part in autoshutdown mode.
AUTOSTANDBY MODE
(PM1 = 0, PM0 =1)
In autostandby mode, portions of the AD7324 are powered
down, but the on-chip reference remains powered up. The
reference bit in the control register should be 1 to ensure that
the on-chip reference is enabled. This mode is similar to
autoshutdown, but allows the AD7324 to power up much faster.
This allows faster throughput rates to be achieved.
signal low, can take place. Once this valid conversion is
SDATA
SCLK
DIN
CS
CS edge, the track-and-hold, which was in hold during
CONTROL REGISTER IS LOADED ON THE FIRST 15 CLOCKS,
1
rising edge. The t
DATA INTO CONTROL REGISTER
CS signal must remain low to keep the
PART ENTERS SHUTDOWN MODE
ON THE 15TH RISING SCLK EDGE
AS PM1 = 1, PM0 = 0
PM1 = 1, PM0 = 0
VALID DATA
th
POWER-UP
SCLK rising edge. In
th
SCLK rising edge.
for autoshutdown
Figure 48. Entering Autoshutdown/Autostandby Mode
th
15
SCLK
PART BEGINS TO POWER
UP ON CS RISING EDGE
16
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As is the case with the autoshutdown mode, the AD7324 enters
standby on the 15
updated (see
registers during standby. Once in autostandby mode, the
signal must remain low to keep the part in autostandby mode.
The AD7324 remains in standby until it receives a CS rising
edge. The ADC begins to power up on the CS rising edge. On
the CS rising edge, the track-and-hold, which was in hold mode
while the part was in standby, returns to track. The power-up
time from standby is 700 ns.
The user should ensure that 700 ns have elapsed before bringing
CS low to attempt a valid conversion. Once this valid conversion
is complete, the AD7324 again returns to standby on the 15
rising edge. The
standby mode.
Figure 48 shows the part entering autoshutdown mode. The
sequence of events is the same when entering autostandby
mode. In
for autoshutdown. For autostandby mode, the power
management bits, PM1 and PM0, should be set to 0 and 1,
respectively.
t
POWER-UP
THE PART IS FULLY POWERED UP
ONCE
Figure 48, the power management bits are configured
Figure 48). The part retains information in the
t
POWER-UP
1
CS signal must remain low to keep the part in
th
SCLK rising edge once the control register is
HAS ELAPSED
DATA INTO CONTROL REGISTER
VALID DATA
15
16
th
CS
SCLK