SN54-74LS192 ONSEMI [ON Semiconductor], SN54-74LS192 Datasheet - Page 6

• Manufacturer Part Number: SN54-74LS192
• Description: PRESETTABLE BCD/DECADE UP/DOWN COUNTER PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER
• Manufacturer: ONSEMI [ON Semiconductor]

AC SETUP REQUIREMENTS
DEFINITIONS OF TERMS
SETUP TIME (t s ) is defined as the minimum time required for
the correct logic level to be present at the logic input prior to the
PL transition from LOW-to-HIGH in order to be recognized and
transferred to the outputs.
HOLD TIME (t h ) is defined as the minimum time following the
PL transition from LOW-to-HIGH that the logic level must be
maintained at the input in order to ensure continued recogni-
t W
t s
t h
t rec
S
Symbol
b l
Any Pulse Width
Data Setup Time
Data Hold Time
Recovery Time
P
Parameter
(T A = 25 C)
SN54/74LS192 SN54/74LS193
FAST AND LS TTL DATA
Min
5.0
20
20
40
Limits
Typ
5-6
tion. A negative HOLD TIME indicates that the correct logic
level may be released prior to the PL transition from
LOW-to-HIGH and still be recognized.
RECOVERY TIME (t rec ) is defined as the minimum time
required between the end of the reset pulse and the clock
transition from LOW-to-HIGH in order to recognize and
transfer HIGH data to the Q outputs.
Max
U i
Unit
ns
ns
ns
ns
T
Test Conditions
V
V CC = 5 0 V
V CC = 5.0 V
C
di i
5 0 V