MC74HC240ANG ON Semiconductor, MC74HC240ANG Datasheet - Page 5
![IC INVERTER DUAL 4-INPUT 20DIP](/photos/7/4/70408/20-dip_738_sml.jpg)
MC74HC240ANG
Manufacturer Part Number
MC74HC240ANG
Description
IC INVERTER DUAL 4-INPUT 20DIP
Manufacturer
ON Semiconductor
Series
74HCr
Specifications of MC74HC240ANG
Logic Type
Inverter
Number Of Inputs
4
Number Of Circuits
2
Current - Output High, Low
7.8mA, 7.8mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Through Hole
Package / Case
20-DIP (0.300", 7.62mm)
Logic Family
74HC
Number Of Channels Per Chip
Octal
Polarity
Inverting
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
125 C
Mounting Style
Through Hole
High Level Output Current
- 7.8 mA
Input Bias Current (max)
4 uA
Low Level Output Current
7.8 mA
Maximum Power Dissipation
750 mW
Minimum Operating Temperature
- 55 C
Number Of Lines (input / Output)
3
Output Type
3-State
Propagation Delay Time
80 ns @ 2 V or 40 ns @ 3 V or 16 ns @ 4.5 V or 14 ns @ 6 V
Circuit Type
Silicon Gate
Current, Supply
160 μA
Function Type
8-Channels
Logic Function
Buffer/Driver/Receiver
Package Type
PDIP-20
Special Features
Inverting, Tri-State
Temperature, Operating, Range
-55 to +125 °C
Voltage, Supply
2 to 6 V
Logical Function
Buffer/Line Driver
Number Of Elements
2
Number Of Channels
8
Number Of Outputs
8
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
6V
Operating Supply Voltage (min)
2V
Quiescent Current
4uA
Technology
CMOS
Pin Count
20
Mounting
Through Hole
Operating Temp Range
-55C to 125C
Operating Temperature Classification
Military
Logic Device Type
Buffer/Line Driver, Inverting
Supply Voltage Range
2V To 6V
Logic Case Style
DIP
No. Of Pins
20
Operating Temperature Range
-55°C To +125°C
Filter Terminals
DIP
Rohs Compliant
Yes
Family Type
HC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MC74HC240ANGOS
INPUTS
A1, A2, A3, A4, B1, B2, B3, B4
(Pins 2, 4, 6, 8, 11, 13, 15, 17)
on the corresponding Y outputs, when the outputs are
enabled.
CONTROLS
Enable A, Enable B (Pins 1, 19)
to these pins, the outputs are enabled and the devices
Data input pins. Data on these pins appear in inverted form
Output enables (active−low). When a low level is applied
DATA INPUT
YA OR YB
OUTPUT
A OR B
*Includes all probe and jig capacitance
t
PHL
t
THL
DEVICE
UNDER
TEST
Figure 3. Test Circuit
10%
50%
90%
Figure 1.
90%
50%
t
r
10%
OUTPUT
TEST POINT
C
L
*
t
f
SWITCHING WAVEFORMS
t
PLH
t
TLH
PIN DESCRIPTIONS
http://onsemi.com
V
GND
MC74HC240A
CC
5
OUTPUT Y
OUTPUT Y
ENABLE
function as inverters. When a high level is applied, the
outputs assume the high−impedance state.
OUTPUTS
YA1, YA2, YA3, YA4, YB1, YB2, YB3, YB4
(Pins 18, 16, 14, 12, 9, 7, 5, 3)
output−enable pins, these outputs are either inverting
outputs or high−impedance outputs.
DEVICE
UNDER
Device outputs. Depending upon the state of the
TEST
*Includes all probe and jig capacitance
50%
OUTPUT
50%
50%
Figure 4. Test Circuit
TEST POINT
t
t
PZL
PZH
Figure 2.
C
1 kW
t
t
L
PHZ
PLZ
*
CONNECT TO V
TESTING t
CONNECT TO GND WHEN
TESTING t
10%
90%
PLZ
PHZ
V
GND
HIGH
IMPEDANCE
V
V
HIGH
IMPEDANCE
AND t
CC
OL
OH
AND t
CC
WHEN
PZL
PZH
.
.