MC10H101PG ON Semiconductor, MC10H101PG Datasheet - Page 6

IC GATE OR/NOR QUAD ECL 16-DIP

MC10H101PG

Manufacturer Part Number
MC10H101PG
Description
IC GATE OR/NOR QUAD ECL 16-DIP
Manufacturer
ON Semiconductor
Series
10Hr
Datasheet

Specifications of MC10H101PG

Logic Type
NOR/OR Gate
Number Of Circuits
4
Number Of Inputs
8 Input (2, 2, 2, 2)
Schmitt Trigger Input
No
Output Type
Differential
Operating Temperature
0°C ~ 75°C
Mounting Type
Through Hole
Package / Case
16-DIP (0.300", 7.62mm)
Product
MUX Gates
Logic Family
ECL
High Level Output Current
- 50 mA
Low Level Output Current
50 mA
Propagation Delay Time
1.6 ns
Supply Voltage (max)
- 5.46 V
Supply Voltage (min)
- 4.94 V
Maximum Operating Temperature
+ 75 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Current - Output High, Low
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC10H101PG
Manufacturer:
ON/安森美
Quantity:
20 000
PUBLICATION ORDERING INFORMATION
MECL 10H and MECL 10K are trademarks of Motorola, Inc.
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ON Semiconductor and
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
16
1
H
−A−
G
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
F
D
9
8
16 PL
0.25 (0.010)
B
S
K
C
M
−T−
T
A
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
SEATING
PLANE
PACKAGE DIMENSIONS
M
PLASTIC DIP PACKAGE
http://onsemi.com
J
CASE 648−08
P SUFFIX
PDIP−16
ISSUE R
6
L
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
Y14.5M, 1982.
FORMED PARALLEL.
DIM
M
A
B
C
D
G
H
K
S
F
J
L
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
0.740
0.250
0.145
0.015
0.040
0.008
0.110
0.295
0.020
MIN
0.100 BSC
0.050 BSC
0
INCHES
_
0.770
0.270
0.175
0.021
0.015
0.130
0.305
0.040
MAX
0.70
10
_
18.80
MILLIMETERS
MIN
6.35
3.69
0.39
1.02
0.21
2.80
7.50
0.51
2.54 BSC
1.27 BSC
0
_
19.55
MAX
6.85
4.44
0.53
1.77
0.38
3.30
7.74
1.01
10
MC10H101/D
_

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