74HCT573N,652 NXP Semiconductors, 74HCT573N,652 Datasheet - Page 8

IC LATCH OCTAL D 3STATE 20DIP

74HCT573N,652

Manufacturer Part Number
74HCT573N,652
Description
IC LATCH OCTAL D 3STATE 20DIP
Manufacturer
NXP Semiconductors
Series
74HCTr

Specifications of 74HCT573N,652

Logic Type
D-Type Transparent Latch
Package / Case
20-DIP (0.300", 7.62mm)
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
4.5 V ~ 5.5 V
Independent Circuits
1
Delay Time - Propagation
17ns
Current - Output High, Low
6mA, 6mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Through Hole
Number Of Circuits
8
Logic Family
74HCT
Polarity
Non-Inverting
High Level Output Current
- 6 mA
Low Level Output Current
6 mA
Propagation Delay Time
17 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-1556-5
74HCT573N
933670940652
Philips Semiconductors
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
AC CHARACTERISTICS FOR 74HCU
GND = 0 V; t
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t
March 1988
SYMBOL PARAMETER
t
t
SYMBOL PARAMETER
t
SYMBOL PARAMETER
t
t
THL
THL
THL
THL
THL
HCMOS family characteristics
/ t
/ t
/ t
/ t
/ t
TLH
TLH
TLH
TLH
TLH
output transition time
output transition time
output transition time
output transition time
output transition time
r
r
r
standard outputs
bus driver outputs
standard outputs
bus driver outputs
= t
= t
= t
f
f
f
= 6 ns; C
= 6 ns; C
= 6 ns; C
L
L
L
= 50 pF
= 50 pF
= 50 pF
min. typ. max. min. max. min. max.
min. typ. max. min. max. min. max.
min. typ. max. min. max. min. max.
19
7
6
14
5
4
19
7
6
7
5
25
25
25
75
15
13
60
12
10
75
15
13
15
12
T
T
T
8
74HCU
74HCT
amb
amb
amb
74HC
40 to 85
40 to 85
40 to 85
( C)
( C)
( C)
95
19
16
75
15
13
95
19
16
19
15
40 to 125
40 to 125
40 to 125
FAMILY SPECIFICATIONS
110
22
19
90
18
15
110
22
19
22
18
ns
ns
ns
ns
ns
UNIT
UNIT
UNIT
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
4.5
V
V
V
(V)
(V)
(V)
TEST CONDITIONS
TEST CONDITIONS
TEST CONDITIONS
CC
CC
CC
Figs 3 and 4
Figs 3 and 4
Fig.1
Figs 8 and 9
Figs 8 and 9
WAVEFORMS
WAVEFORMS
WAVEFORMS

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