PI6C180V Pericom Semiconductor, PI6C180V Datasheet

PI6C180V

Manufacturer Part Number

PI6C180V

Description

Manufacturer

Pericom Semiconductor

Datasheet

1.PI6C180.pdf (7 pages)

Specifications of PI6C180V

Case

SSOP-48

Date_code

99+/SZ

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Features

• High-speed, to 100 MHz

• Low-noise non-inverting 1-18 buffer

• Supports up to four SDRAM DIMMs

• Low skew (< 250ps) between any two output clocks

• I

• Multiple V

• 3.3V power supply voltage

• Separate Hi-Z pin for testing

• Packaging:

Block Diagram

- 48-pin SSOP (V)

C Serial Configuration interface

BUF_IN

SCLOCK

, V

SDATA

pins for noise reduction

I 2 C

I/O

SDRAM0

SDRAM1

SDRAM2

SDRAM3

SDRAM17

Description

The PI6C180, a high-speed low-noise 1-18 non-inverting buffer

designed for SDRAM clock buffer applications operates up to

100 MHz.

At power up all SDRAM output are enabled and active. The I

Serial control may be used to individually activate/deactivate any

of the 18 output drivers.

The output enable (OE) pin may be pulled low to put all outputs

in a Hi-Z state.

Note:

Purchase of I

use them in an I

Pin Configuration

SDRAM16

SDRAM2

SDRAM3

SDRAM6

SDRAM7

SDRAM0

SDRAM1

SDRAM4

SDRAM5

BUF_IN

C components from Pericom conveys a license to

SDATA

C system as defined by Philips.

DDIIC

DD1

DD3

DD4

DD0

DD2

SS0

SS1

SS3

SS2

SS4

Precision 1-18 Clock Buffer

SDRAM15

SDRAM14

SDRAM13

SDRAM12

SDRAM11

SDRAM10

SDRAM9

SDRAM8

SDRAM17

SCLOCK

DD9

SS9

DD8

SS8

DD7

SS7

DD6

SS6

DD5

SS5

SSIIC

PS8141F

PI6C180

12/13/04

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