ADSP-BF532 Analog Devices, ADSP-BF532 Datasheet

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ADSP-BF532

Manufacturer Part Number
ADSP-BF532
Description
Manufacturer
Analog Devices
Datasheets

Specifications of ADSP-BF532

Case
BGA
Date_code
09+

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FEATURES
Up to 600 MHz high performance Blackfin processor
0.85 V to 1.30 V core V
1.8 V, 2.5 V, and 3.3 V compliant I/O
160-ball CSP_BGA, 169-ball PBGA, and 176-lead LQFP
MEMORY
Up to 148K bytes of on-chip memory:
Memory management unit providing memory protection
Blackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc.
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs,
RISC-like register and instruction model for ease of pro-
Advanced debug, trace, and performance monitoring
packages
16K bytes of instruction SRAM/Cache
Up to 64K bytes of instruction SRAM
Up to32K bytes of data SRAM/Cache
Up to32K bytes of data SRAM
4K bytes of scratchpad SRAM
40-bit shifter
gramming and compiler-friendly support
DD
with on-chip voltage regulation
VOLTAGE REGULATOR
INSTRUCTION
B
MEMORY
16
L1
FLASH, SDRAM CONTROL
EXTERNAL ACCESS BUS
EXTERNAL PORT
MEMORY
DATA
L1
JTAG TEST AND EMULATION
DMA CORE BUS
Figure 1. Functional Block Diagram
ADSP-BF531/ADSP-BF532/ADSP-BF533
BOOT ROM
CONTROLLER
CONTROLLER
INTERRUPT
DMA
EXTERNAL
DMA
BUS
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
External memory controller with glueless support for
Flexible memory booting options from SPI
PERIPHERALS
Parallel peripheral interface PPI/GPIO, supporting
Two dual-channel, full duplex synchronous serial ports, sup-
Four memory-to-memory DMAs
Eight peripheral DMAs
SPI-compatible port
Three 32-bit timer/counters with PWM support
Real-time clock and watchdog timer
32-bit core timer
Up to 16 general-purpose I/O pins (GPIO)
UART with support for IrDA
Event handler
Debug/JTAG interface
On-chip PLL capable of 0.5 to 64 frequency multiplication
SDRAM, SRAM, flash, and ROM
external memory
ITU-R 656 video data formats
porting eight stereo I
WATCHDOG
SPORT0-1
TIMER0-2
TIMER
UART
RTC
PPI
SPI
Embedded Processor
©2007 Analog Devices, Inc. All rights reserved.
2
S channels
®
PORT
GPIO
F
Blackfin
®
www.analog.com
and
®

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