CY7C168A-25DMB Cypress Semiconductor Corporation., CY7C168A-25DMB Datasheet

CY7C168A-25DMB

Manufacturer Part Number

CY7C168A-25DMB

Description

Manufacturer

Cypress Semiconductor Corporation.

Datasheets

1.CY7C168A-25DMB.pdf (9 pages)

2.CY7C168A-25DMB.pdf (9 pages)

3.CY7C168A-45DMB.pdf (9 pages)

Specifications of CY7C168A-25DMB

Date_code

00+

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

BOSTOCK HK LIMITED

Part Number:

CY7C168A-25DMB

Manufacturer:

CYP

Quantity:

1 967

Current page: 1 of 9
Download datasheet (185Kb)

Features

Selection Guide

Cypress Semiconductor Corporation

Maximum Access Time (ns)

Maximum Operating

Current (mA)

• Automatic power-down when deselected

• CMOS for optimum speed/power

• High speed

• Low active power

• Low standby power

• TTL-compatible inputs and outputs

• V

• Capable of withstanding greater than 2001V electrostat-

ic discharge

— t

— 633 mW

— 110 mW

of 2.2V

Logic Block Diagram

= 15 ns

INPUTBUFFER

Commercial

Military

DECODER

128 x 128

COLUMN

ARRAY

(7C168A)

POWER

•

DOWN

3901 North First Street

7C168A-15

115

7C168A-20

C168A-1

Functional Description

The CY7C168A is a high-performance CMOS static RAM or-

ganized as 4096 by 4 bits. Easy memory expansion is provided

by an active LOW Chip Enable (CE) and three-state drivers.

The CY7C168A has an automatic power-down feature, reduc-

ing the power consumption by 77% when deselected.

Writing to the device is accomplished when the Chip Select

(CE) and Write Enable (WE) inputs are both LOW. Data on the

four data input/output pins (I/O

memory location specified on the address pins (A

Reading the device is accomplished by taking the Chip Enable

(CE) LOW, while Write Enable (WE) remains HIGH. Under

these conditions, the contents of the location specified on the

address pins will appear on the four data input/output pins

(I/O

The input/output pins remain in a high-impedance state when

Chip Enable (CE) is HIGH or Write Enable (WE) is LOW.

A die coat is used to insure alpha immunity.

I/O

100

through I/O

•

San Jose

7C168A-25

GND

Pin Configurations

100

•

Top View

DIP/SOJ

7C168A

CA 95134

7C168A-35

through I/O

100

I/O

4Kx4 RAM

CY7C168A

•

) is written into the

February 3, 2000

C168A-2

408-943-2600

7C168A-45

100

through

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