74ABT573CSCX Fairchild Semiconductor, 74ABT573CSCX Datasheet
74ABT573CSCX
Specifications of 74ABT573CSCX
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74ABT573CSCX Summary of contents
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... Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. ©1993 Fairchild Semiconductor Corporation 74ABT573 Rev. 1.5.0 General Description The ABT573 is an octal latch with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs ...
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... Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. ©1993 Fairchild Semiconductor Corporation 74ABT573 Rev. 1.5.0 Functional Description The ABT573 contains eight D-type latches with 3-STATE output buffers. When the Latch Enable (LE) input is HIGH, data on the D inputs enters the latches ...
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... T Free Air Ambient Temperature A V Supply Voltage Minimum Input Edge Rate Data Input Enable Input ©1993 Fairchild Semiconductor Corporation 74ABT573 Rev. 1.5.0 Parameter Parameter 3 Rating –65°C to +150°C –55°C to +125°C –55°C to +150°C –0.5V to +7.0V –0.5V to +7.0V – ...
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... Outputs Enabled CCT I /Input CC Outputs 3-STATE Outputs 3-STATE I Dynamic I No Load CCD CC Notes: 2. For 8-bits toggling, I 0.8mA/MHz. CCD 3. Guaranteed but not tested. ©1993 Fairchild Semiconductor Corporation 74ABT573 Rev. 1.5.0 V Conditions CC Recognized HIGH Signal Recognized LOW Signal Min. I –18mA IN Min. I –3mA OH I –32mA OH Min ...
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... SOIC and SSOP package. Symbol Parameter t Propagation Delay, D PLH t PHL t Propagation Delay PLH t PHL t Output Enable Time PZH t PZL t Output Disable Time PHZ t PLZ ©1993 Fairchild Semiconductor Corporation 74ABT573 Rev. 1.5.0 Conditions C 50pF 500 CC L (4) 5.0 T 25°C A (4) 5.0 T 25° (5) 5 ...
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... LOW-to-HIGH, HIGH-to-LOW, etc.) with 250 pF load capacitors in place of the 50pF load capacitors in the standard AC load. 10. The 3-STATE delay times are dominated by the RC network (500 , 250pF) on the output and has been excluded from the datasheet. ©1993 Fairchild Semiconductor Corporation 74ABT573 Rev. 1.5.0 T +25°C, ...
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... Propagation delay variation for a given set of conditions (i.e., temperature and V specification is guaranteed but not tested. Capacitance Symbol Parameter C Input Capacitance IN (16) C Output Capacitance OUT Note: 16 measured at frequency f OUT ©1993 Fairchild Semiconductor Corporation 74ABT573 Rev. 1.5.0 T –40°C to +85° 4.5V to 5.5V 50pF Outputs (11) Switching Max. 1.0 1 ...
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... Figure 1. Test Load Amplitude Rep. Rate AC Waveforms Figure 4. Propagation Delay Waveforms for Inverting and Non-Inverting Functions Figure 5. Propagation Delay, Pulse Width Waveforms ©1993 Fairchild Semiconductor Corporation 74ABT573 Rev. 1.5 3.0V 1MHz 500ns Figure 3. Test Input Signal Requirements 8 Figure 2 ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...