PI74LPT16373CA Pericom Semiconductor, PI74LPT16373CA Datasheet
![no-image](/images/manufacturer_photos/0/5/521/pericom_semiconductor_sml.jpg)
PI74LPT16373CA
Manufacturer Part Number
PI74LPT16373CA
Description
48/16-BIT TRANSPARENT LATCH; EOL: REPL: Check PI74LPT16373CVE; LTB(d/m/y):3
Manufacturer
Pericom Semiconductor
Datasheet
1.PI74LPT16373CVE.pdf
(4 pages)
Specifications of PI74LPT16373CA
Pack_quantity
39
Comm_code
85423990
Lead_time
56
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Features
• Compatible with LCX™ and LVT™ families of products
• Supports 5V Tolerant Mixed Signal Mode Operation
• Advanced Low Power CMOS Operation
• Excellent output drive capability:
• Low ground bounce outputs
• Hysteresis on all inputs
• Industrial operating temperature range: –40°C to +85°C
• Packages available:
Logic Block Diagram
Truth Table
Note:
1. H = High Voltage Level, X = Don't Care,
– Input can be 3V or 5V
– Output can be 3V or connected to 5V bus
Balanced drives (24 mA sink and source)
– 20-pin 173 mil wide plastic TSSOP (L)
– 20-pin 150 mil wide plastic QSOP (Q)
– 20-pin 150 mil wide plastic TQSOP (R)
– 20-pin 300 mil wide plastic SOIC (S)
L = Low Voltage Level, Z = High Impedance
OE
LE
D
D
0
H
X
L
N
Inputs
TO 7 OTHER CHANNELS
LE
H
H
X
(1)
D
G
O
OE
H
L
L
Outputs
O
H
L
Z
O
N
0
(1)
1
Description
Pericom Semiconductor’s PI74LPT series of logic circuits are pro-
duced in the Company’s advanced 0.6 micron CMOS technology,
achieving industry leading speed grades.
The PI74LPT573 is an 8-bit transparent latch designed with
3-state outputs and is intended for bus oriented applications. When
Latch Enable (LE) is HIGH, the flip-flops appear transparent to the
data. The data that meets the set-up time when LE is LOW is latched.
When OE is HIGH, the bus output is in the high impedance state.
The PI74LPT573 can be driven from either 3.3V or 5.0V devices
allowing this device to be used as a translator in a mixed
3.3/5.0V system.
Pinout
Pin Description
GND
Pin Name
OE
LE
D7-D0
O7-O0
GND
V
OE
D0
D1
D2
D3
D4
D5
D6
D7
CC
1
2
3
4
5
6
7
8
9
10
20-Pin
R20
Q20
L20
S20
Description
Output Enable Input (Active LOW)
Latch Enable Input (Active HIGH)
Data Inputs
3-State Outputs
Ground
Power
20
19
18
17
16
15
14
13
12
11
Vcc
O0
O1
O2
O3
O4
O5
O6
O7
LE
Fast CMOS 3.3V 8-Bit
Transparent Latch
PI74LPT573
PS2063A 01/15/97