EPC120 EPC [Espros Photonics corp], EPC120 Datasheet - Page 11

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EPC120

Manufacturer Part Number
EPC120
Description
Fully integrated Light-Barrier Chips with 2-Wire Bus Interface
Manufacturer
EPC [Espros Photonics corp]
Datasheet
4 The non-volatile memory is a one-time-programmable memory (OTP). Once the memory is programmed, the programmed values cannot
5 Hereinafter called RAM.
Parameter Memory
The epc120 device contains a memory to store the application parameters. The following classes of data are stored on each device:
This data can be permanently stored in a read-only memory
is copied from the ROM to the RAM. During operation, the data from the RAM is used. Both memories are organized in 16 registers at 16 bits
each. The data can be accessed on a 16-bit register base. The following table shows the memory organization:
As shown in the table above, registers 0 – 3 and 7 are used for configuring the chip in the application. Before the devices can be used in a
given light curtain system, the required application parameters and the physical address of the chip in the system have to be stored into the
devices memories. The following table shows a parameter memory overview:
Parameters in white fields only shall be programmed. Never change the memory content of gray marked cells. Because only complete
registers can be programmed, the bits which are gray marked must be set to zero.
The RAM can only be written, if the corresponding ROM memory hasn’t been written before or if the volatile mode is active (VMODE, refer to
Table 3 on page 11). The last bit of each 16-bit ROM register serves as write inhibit bit. To write to the ROM, the microcontroller has to write to
the RAM first. From there, the microcontroller can first double check the data integrity. When a memory section is verified, the content can be
transferred from the RAM memory using the command PROG to the ROM (refer to chapter Command PROG).
The device is fully operational as well without programming the ROM but data will be lost at power down. Operating the chips in this mode is
helpful during the development of the product. However, in the final application, the parameters must be stored into the ROM memory.
© 2011 ESPROS Photonics Corporation
Characteristics subject to change without notice
ROM RAM
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
be overwritten anymore! This memory type is hereinafter called ROM.
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
VMODE
Non-Volatile Memory Address
Unique chip ID and chip adjustments (factory set)
Physical device address in the application, representing the beam number
Application parameters
15
TPER
TSET
(Register no.)
14
Range
8 – 15
0 - 3
4 - 6
MODE
7
-
13
12
SOFF
11
Address
CDET
10
Volatile Memory Address
DRATE
Figure 12: Detailed memory map
SENS IVCOFF SLOW
Table 2: Memory map overview
C2X
(Register no.)
9
16 – 19
20 – 22
24 – 31
Range
4
and is mirrored in a volatile memory
23
-
8
Chip ID
TSTMP
7
11
6
Description
Application parameters
Trim values, factory set
Device Address
Chip ID, factory set
For factory test purpose. Read only.
SENSH
5
4
5
TPULSE
. At power up, the data (except the chip ID)
3
SENSN / VTHRLED
2
POL
1
Datasheet epc12x - V2.1
FUSEBIT
FUSEBIT
FUSEBIT
0
www.espros.ch
Device Address
parameters
Application
epc120
Trimming
Chip ID

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