AK4122A AKM [Asahi Kasei Microsystems], AK4122A Datasheet - Page 11
AK4122A
Manufacturer Part Number
AK4122A
Description
24-Bit 96kHz SRC with DIR
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet
1.AK4122A.pdf
(54 pages)
- Current page: 11 of 54
- Download datasheet (536Kb)
Parameter
Control Interface Timing
Reset Timing
Note 11. BICK rising edge must not occur at the same time as LRCK edge.
Note 12. In case of using INT2. When INT2 is not used, the max value is not limited.
Note 13. The AK4122A can be reset by bringing the PDN pin = “L”.
MS1076-E-01
CCLK Period
CCLK Pulse Width Low
CDTI Setup Time
CDTI Hold Time
CSN “H” Time
CSN “↓” to CCLK “↑”
CCLK “↑” to CSN “↑”
CDTO Delay
CSN “↑” to CDTO Hi-Z
PDN Pulse Width
Output for PORT3 (Slave mode)
BICK Period
BICK Pulse Width Low
LRCK Edge to BICK “↑”
BICK “↑” to LRCK Edge
LRCK to SDTO (MSB) (Except I
BICK “↓” to SDTO
Output for PORT2 (Master mode)
BICK2 Frequency
BICK2 Duty
BICK2 “↓” to LRCK2
BICK2 “↓” to SDTIO
Output for PORT3 (Master mode)
BICK Frequency
BICK Duty
BICK “↓” to LRCK
BICK “↓” to SDTO
Pulse Width High
Pulse Width High
2
(Note
(Note
S mode)
(Note
(Note
13)
11)
11)
12)
Symbol
tMBLR
tMBLR
tBCKH
tCCKH
tBCKL
tCCKL
dBCK
dBCK
fBCK
fBCK
tCDH
tCSW
tDCD
tBCK
tCCK
tLRB
tBLR
tBSD
tBSD
tBSD
tCDS
tCSH
tCCZ
tLRS
tCSS
tPD
- 11 -
1/64fs
min
−20
−20
−20
−20
200
150
150
65
65
30
30
80
80
40
40
50
50
64fs
64fs
typ
50
50
1000
max
30
30
20
30
20
30
45
70
[AK4122A]
Units
2010/05
Hz
Hz
ns
ns
ns
ns
ns
ns
ns
%
ns
ns
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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