ZL30101QDC ZARLINK [Zarlink Semiconductor Inc], ZL30101QDC Datasheet - Page 5

no-image

ZL30101QDC

Manufacturer Part Number
ZL30101QDC
Description
T1/E1 Stratum 3 System Synchronizer
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.0
Changes from June 2004 Issue to October 2004 Issue. Page, section, figure and table numbers refer to this issue.
Page
1
6
7
10
15
19
20
25
26
27
28
32
32
32
Change Summary
Item
Text
Figure 2
Table “Pin Description“
Section 3.2
Section 3.4
Section 4.4
Section 5.0
Section 6.4
Table “Absolute Maximum Ratings*“
Table “DC Electrical Characteristics*“
Table “AC Electrical Characteristics* -
Input Timing for REF0 and REF1
References (see Figure 16)“
Table “Performance Characteristics*:
Output Jitter Generation - ANSI
T1.403 Conformance“
Table “Performance Characteristics*:
Output Jitter Generation - ITU-T
G.812 Conformance“
Table “Performance Characteristics* -
Unfiltered Intrinsic Jitter“
Zarlink Semiconductor Inc.
Change
Jitter changed to 0.6 ns from 0.5 ns
Added note specifying not e-Pad
Added information about Schmitt trigger feedback paths to
C1.5o, C2o, C16o, and F8/F32o
Added text about input pulse width restriction
Added details on LOCK pin behaviour
Added text and Figure 10 explaining LOCK pin behaviour
Added Jitter definition
Corrected time-constant of example reset circuit
Corrected package power rating
Corrected current consumption
Corrected input voltage characteristics to reflect Schmitt trigger
Corrected input leakage current to reflect internal pull-ups
Corrected output voltage note to reflect two pad strengths
Added explanatory note
Changed jitter numbers
Changed jitter number
Changed jitter numbers, removed UI column
ZL30101
5
Data Sheet

Related parts for ZL30101QDC