ZL30410QCC ZARLINK [Zarlink Semiconductor Inc], ZL30410QCC Datasheet

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... Zarlink Semiconductor US Patent No. 5,602,884, UK Patent No. 0772912, France Brevete S.G.D.G. 0772912; Germany DBP No. 69502724.7-08 Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2003, Zarlink Semiconductor Inc. All Rights Reserved. ZL30410QCC • Clock generation for ST-BUS and GCI timing Description ...

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ZL30410 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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ZL30410 Pinout 1.1 Pin Connections SECOR OE NC RESET GND IC IC VDD Figure 2 - Pin Connections for 80-pin LQFP package ZL30410 ...

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Pin Description Pin # Name 1 IC Internal Connection. Leave unconnected. 2 internal bonding Connection. Leave unconnected. 6 GND Ground. Negative power supply internal bonding Connection. Leave unconnected. 9 FCS Filter Characteristic Select (Input). ...

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Pin Description (continued) Pin # Name 21 E3DS3/OC3 E3DS3 or OC3 Selection (Input). In Hardware Control, a logic low on this pin enables the C155P/N outputs (pin 30 and pin 31) and sets the C34/C44 output (pin 53) to provide ...

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Pin Description (continued) Pin # Name 36 Tclk IEEE1149.1a Test Clock Signal (5 V tolerant input). Input clock for the JTAG test logic. If not used, this pin should be pulled up to VDD. 37 Trst IEEE1149.1a Reset Signal (3.3 ...

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Pin Description (continued) Pin # Name 53 C34/C44 Clock 34.368 MHz / clock 44.736 MHz (CMOS Output). This clock is programmable to be either 34.368 MHz (for E3 applications) or 44.736 MHz (for DS3 applications) when E3DS3/OC3 is high, or ...

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Functional Description The ZL30410 is designed to provide timing for SDH and SONET equipment conforming to ITU-T, ANSI, ETSI and Telcordia recommendations. In addition, it generates clocks for SDH and PDH equipment operating at DS1, DS2, DS3, E1, and ...

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LOCK HOLDOVER RefAlign MUX Detector Figure 3 - Core PLL Functional Block Diagram 2.2.1 Digitally Controlled Oscillator (DCO) The DCO is an arithmetic unit that continuously generates a stream of numbers that represent the phase-locked clock. These numbers are passed ...

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Using RefAlign with 1.544 MHz, 2.048 MHz or 19.44 MHz Reference If the ZL30410 is locked to a 1.544 MHz, 2.048 MHz or 19.44 MHz reference, then the output clocks can be brought into phase alignment with the PLL reference ...

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C155 : 155.52 MHz clock with nominal 50% duty cycle. The ZL30410 provides the following frame pulses (see Figure 15 "ST-BUS and GCI Output Timing" for details). All frame pulses have the same 125µs period (8kHz frequency): - F0o ...

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MS2,MS1=00 OR RESET=1 MS2,MS1=01 FREE- RESET RUN 10 MS2,MS1=10 forces unconditional return from any state to Free-run Notes: {AUTO} - Automatic internal transition {MANUAL} - User initiated transition --> - External transition Reset State The Reset State must be entered ...

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Holdover State (Holdover Mode) The Holdover State is typically entered for a short duration while synchronization with the network is temporarily disrupted. In Holdover Mode, the ZL30410 generates clocks, which are not locked to an external reference signal but their ...

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JTAG Interface The ZL30410 JTAG (Joint Test Action Group) interface conforms to the Boundary-Scan standard IEEE1149.1-1990, which specifies a design-for-testability technique called Boundary-Scan Test (BST). The BST architecture is made up of four basic elements, Test Access Port (TAP), ...

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FCS pin: Filter Characteristic Select. The FCS (pin 9) input is used to select the filtering characteristics of the Core PLL. See Table 2 on page 15 for details. FCS 0 Filter corner frequency set to 12Hz. This selection meets ...

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SECOR - (Secondary Reference Out of Range). Functionally, this pin is equivalent to the PRIOR pin for Primary Acquisition PLL. C20i Clock Accuracy 0 ppm +4.6 ppm -4.6 ppm -16.6 -13.8 -20 Figure 7 - Primary and Secondary Reference Out ...

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MS2,MS1=01 OR MS2,MS1=00 RESET=1 OR MS2,MS1=01 FREE- RESET RUN 10 MS2,MS1=10 forces unconditional return from any state to Free-run Figure 8 - Transition from Free-run to Normal mode 4.1.2 Single Reference Operation: NORMAL --> AUTO HOLDOVER --> NORMAL The NORMAL ...

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The Core PLL will automatically return to the Normal state after the reference signal recovers from failure. This transition is shown on the state diagram as a FAIL --> OK change. This change becomes effective when the reference is restored ...

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Dual Reference Operation: NORMAL --> AUTO HOLDOVER--> HOLDOVER --> NORMAL The NORMAL to AUTO-HOLDOVER to HOLDOVER to NORMAL sequence represents the most likely operation of the ZL30410. The sequence starts from the Normal state and transitions to Auto Holdover ...

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Reference Switching (RefSel): NORMAL --> HOLDOVER --> NORMAL The NORMAL to HOLDOVER to NORMAL mode switching is usually performed when reference clock is available but its frequency drifts beyond some specified limit Network Element with ...

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Power supply filtering Figure 13 presents a complete filtering arrangement that is recommended for applications requiring maximum jitter performance GND VDD ZL30410 C1 C2 ...

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Characteristics 5.1 AC and DC Electrical Characteristics Absolute Maximum Ratings* Parameter 1 Supply voltage 2 Voltage on any pin 3 Current on any pin 4 Storage temperature 5 Package power dissipation (80 pin LQFP) 6 ESD rating * Voltages ...

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AC Electrical Characteristics - Timing Parameter Measurement - CMOS Voltage Levels* Characteristics 1 Threshold voltage 2 Rise and fall threshold voltage High 3 Rise and fall threshold voltage Low * Voltages are with respect to ground (GND) unless otherwise stated ...

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AC Electrical Characteristics - ST-BUS and GCI Output Timing* Characteristics 1 F16o pulse width low (nom 61 ns) 2 F8o to F16o delay 3 C16o pulse width low 4 F8o to C16o delay 5 F8o pulse width high (nom 122 ...

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AC Electrical Characteristics - DS1 and DS2 Clock Timing* Characteristics 1 C6o pulse width low 2 F8o to C6o delay 3 C1.5o pulse width low 4 F8o to C1.5o delay * Supply voltage and operating temperature are as per Recommended ...

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AC Electrical Characteristics - C155o and C19o Clock Timing Characteristics 1 C155o pulse width low 2 C155o to C19o rising edge delay 3 C155o to C19o falling edge delay 4 C19 pulse width high * Supply voltage and operating temperature ...

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AC Electrical Characteristics - Input to Output Phase Offset (after phase realignment)* Characteristics 1 8 kHz ref pulse width high or low 2 8 kHz ref input to F8o delay 3 1.544 MHz ref: pulse width high or low 4 ...

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AC Electrical Characteristics - Input Control Signals* Characteristics 1 Input controls Setup time 2 Input controls Hold time * Supply voltage and operating temperature are as per Recommended Operating Conditions F8o MS1, MS2 RefSel, FCS, RefAlign E3/DS3 E3DS3/OC3 Figure 19 ...

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Performance Characteristics Performance Characteristics* Characteristics 1 Holdover accuracy (6Hz filter) 2 Holdover accuracy (12Hz filter) 3 Holdover stability 4 Capture range 5 Reference Out of Range Threshold Lock Time Filter ...

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Performance Characteristics : Measured Output Jitter - Telcordia GR-253-CORE and ANSI T1.105.03 Jitter Generation Requirements Jitter Interface Measurement Filter 1 OC-3 65kHz to 1.3MHz 155.52 2 12kHz to1.3MHz Mbit/s (Category II) 3 500Hz to 1.3MHz 4 OC-3 65kHz to 1.3MHz ...

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Performance Characteristics : Measured Output Jitter - ITU-T G.747 Jitter Generation Requirements Jitter Interface Measurement Filter 1 DS2 60kHz 6312 kbit/s * Supply voltage and operating temperature are as per Recommended Operating Conditions Performance Characteristics : Measured ...

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Performance Characteristics : Measured Output Jitter - ITU-T G.732, G.735, G.736, G.737, G.738, G.739 Jitter Generation Requirements Jitter Interface Measurement Filter 100 kHz 2048 kbit/s * Supply voltage and operating temperature are as per Recommended ...

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Performance Characteristics : Measured Output Jitter - ITU-T G.812 Jitter Generation Requirements Jitter Interface Measurement Filter 1 STM-1 65kHz to 1.3MHz optical 2 500Hz to 1.3MHz 155.52 Mbit/s 3 STM-1 65kHz to 1.3MHz electrical 155.52 4 500Hz to 1.3MHz Mbit/s ...

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Performance Characteristics : Measured Output Jitter - ITU-T G.813 Jitter Generation Requirements Jitter Interface Measurement Filter Option 1 1 STM-1 65kHz to 1.3MHz 155.52 2 500Hz to 1.3MHz Mbit/s 3 STM-1 65kHz to 1.3MHz 155.52 4 500Hz to 1.3MHz Mbit/s ...

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Performance Characteristics : Measured Output Jitter - ETSI EN 300 462-7-1 Jitter Generation Requirements Jitter Interface Measurement Filter 1 STM-1 65kHz to 1.3MHz optical 155.52 2 500Hz to 1.3MHz Mbit/s 3 STM-1 65kHz to 1.3MHz electrical 155.52 4 500Hz to ...

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Performance Characteristics - Measured Output Jitter - Unfiltered* Characteristics 1 C1.5o (1.544MHz) 2 C2o (2.048MHz) 3 C4o (4.096MHz) 4 C6o (6.312MHz) 5 C8o (8.192MHz) 6 C8.5o (8.592MHz) 7 C11o (11.184MHz) 8 C16o (16.384MHz) 9 C19o (19.44MHz) 10 C34o (34.368MHz) 11 ...

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