ZL50016 ZARLINK [Zarlink Semiconductor Inc], ZL50016 Datasheet - Page 62

• Manufacturer Part Number: ZL50016
• Description: Enhanced 1 K Digital Switch
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

† Characteristics are over recommended operating conditions unless otherwise stated.
‡ Typical figures are at 25°C, VDD_CORE at 1.8 V and VDD_IO at 3.3 V and are for design aid only: not guaranteed and not subject to produc-
tion testing.
AC Electrical Characteristics
Note 1:
Note 2:
10 Acknowledgement delay time.
12 RDY drive low to HiZ
11 Acknowledgement hold time.
1
2
3
4
5
6
7
8
9
CS
RD
WR
A0-A13
D0-D15
RDY
CS de-asserted time
RD setup to CS falling
WR setup to CS falling
Address setup to CS falling
RD hold after CS rising
WR hold after CS rising
Address hold after CS rising
Data setup to RDY high
Data Active to High Impedance
From CS low to RDY high:
From CS high to RDY low
Registers
Memory
discharge C
A delay of 500 µs to 2 ms (see Section 13.2 on page 32) must be applied before the first microprocessor access is
performed after the RESET pin is set high.
High impedance is measured by pulling to the appropriate rail with R
Characteristics
L
.
Figure 22 - Intel Non-Multiplexed Bus Timing - Read Access
†
- Intel Non-Multiplexed Bus Mode - Read Access
t
CSD
Sym.
t
t
t
t
t
t
t
Zarlink Semiconductor Inc.
CSD
t
t
t
t
t
AKD
AKH
CSZ
AKZ
WS
WH
RH
RS
AS
AH
DS
t
t
t
RS
AS
WS
ZL50016
Min.
15
10
10
62
5
0
0
0
8
7
4
Typ.
VALID ADDRESS
t
AKD
‡
L
, with timing corrected to cancel time taken to
t
DS
Max.
175
185
VALID READ DATA
12
8
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
t
AH
AKH
t
CSZ
C
C
(Note 1)
C
C
C
(Note 1)
t
t
RH
WH
L
L
L
L
L
Test Conditions
t
= 50 pF
= 50 pF, R
= 50 pF
= 50 pF
= 50 pF, R
AKZ
Data Sheet
V
V
V
V
V
V
CT
CT
CT
CT
L
L
CT
CT
= 1 K
= 1 K
2