ZL50051 ZARLINK [Zarlink Semiconductor Inc], ZL50051 Datasheet - Page 26

• Manufacturer Part Number: ZL50051
• Description: 8 K Channel Digital Switch with High Jitter Tolerance, Single Rate (8 or 16 Mbps), and 64 Inputs and 64 Outputs
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

5.0
Serial data which goes into the device is converted into parallel format and written to consecutive locations in the
data memory. Each data memory location corresponds to the input stream and channel number. Channels written
to any of the buffers during Frame N will be read out during Frame N+2. The input bit delay and output bit
advancement have no impact on the overall data throughput delay.
In the following paragraphs, the data throughput delay (T) is represented as a function of ST-BUS frames, input
channel number, (m), and output channel number (n). Table 2 describes the variable range for input streams and
Table 3 describes the variable range for output streams. The data throughput delay under various input channel
and output channel conditions can be summarized as:
T = 2 frames + (n - m)
The data throughput delay (T) is: T = 2 frames + (n - m). Assuming that m (input channel) and n (output channel)
are equal, we have the figure below, in which the delay between the input data being written and the output data
being read is exactly 2 frames.
Data Delay Through the Switching Paths
(input pin)
RESET
Table 1 - Local and Backplane Output Enable Control Priority (continued)
1
1
1
1
(input pin)
ODE
1
1
1
1
Table 3 - Variable Range for Output Streams
Table 2 - Variable Range for Input Streams
Output Stream
Input Stream
Data Rate
Data Rate
16 Mbps
16 Mbps
8 Mbps
8 Mbps
Register bit)
(Control
OSB
Zarlink Semiconductor Inc.
0
1
1
1
ZL50051/3
26
Memory bit)
Connection
Backplane
Input Channel
(Local /
Output Channel
LE/BE
Number (m)
Number (n)
X
0
0
1
0 to 127
0 to 255
0 to 127
0 to 255
LORS/BORS
(input pin)
X
1
0
1
(HIGH or LOW)
LSTo0-31/
BSTo0-31
ACTIVE
HIGH
HI-Z
HI-Z
Data Sheet