ZL50070GAC ZARLINK [Zarlink Semiconductor Inc], ZL50070GAC Datasheet - Page 44

• Manufacturer Part Number: ZL50070GAC
• Description: 24 K Channel Digital Switch with High Jitter Tolerance, Rate Conversion per Group of 4 Streams (8, 16, 32 or 64 Mbps), and 96 Inputs and 96 Outputs
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

The Group Control Register is a static control register. Changes to bit settings may disrupt data flow on the selected
port for a maximum of 2 frames.
8 - 4
3 - 2
1 - 0
External Read/Write Address: 40200
Reset Value: 000C000C
Bit
31
15
0
0
30
14
0
0
ISSRC1 - 0
ISPD4 - 0
ISBR1 - 0
Name
29
13
0
0
28
12
0
0
H
27
11
Input Sampling Point Delay
Default Sampling Point is 3/4. Adjust according to Figure on page 20.
Input Stream Bit Rate
Unused streams must be connected to ground.
If the internal system clock is used as the clock source, all the above data rates are
available. Otherwise, the data rate cannot exceed the selected clock source’s rate.
Input Stream Clock Source Select
0
0
Table 25 - Group Control Register (continued)
H
ISBR1 - 0
ISSRC1 - 0
26
10
- 4025F
0
0
00
01
10
11
00
01
10
11
25
ISI
0
9
H
ISPD 4
24
8
Zarlink Semiconductor Inc.
0
16.384 Mbps
32.768 Mbps
65.536 Mbps
8.192 Mbps
STi/oA
ZL50070
ISPD 3
23
7
0
Internal System Clock
Input Timing Source
44
CKi0 and FPi0
CKi1 and FPi1
CKi2 and FPi2
ISPD2
OSI
22
6
16.384 Mbps
32.768 Mbps
Description
8.192 Mbps
OSBA 1
Not Used
ISPD
STi/oB
21
5
1
Bit Rates Per Group
OSBA 0 OSBR 1 OSBR 0
ISPD
20
4
0
ISBR 1
16.384 Mbps
8.192 Mbps
19
Not Used
Not Used
3
STi/oC
ISBR 0
18
2
OSSRC 1 OSSRC 0
ISSRC 1
16.384 Mbps
8.192 Mbps
17
1
Not Used
Not Used
STi/oD
Data Sheet
ISSRC 0
16
0