ACX302 SONY [Sony Corporation], ACX302 Datasheet
ACX302
Related parts for ACX302
ACX302 Summary of contents
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... Type) NTSC/PAL Color LCD Panel Description The ACX302AK is a 8.80cm diagonal active matrix TFT-LCD panel addressed by low temperature polycrystalline silicon transistors peripheral driving circuitry. This panel provides full- color representation for NTSC and PAL systems. In addition, RGB dots are arranged in a delta pattern ...
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... Block Diagram The panel block diagram is shown below. H Level Shifter & Shift Register Level Shifter Common Voltage Negative Voltage Generation Circuit – 2 – COM ACX302AK ...
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... V –1.0 to +15 V –3.0 to +1.0 V –1 –1.0 to +15 V –1.0 to +13 V –10 to +60 °C –30 to +85 °C (Vss = 0V) Typ. Max. Unit 12.0/13.5 V 14.0 V 12.0/13.5 14.0 V 12.0/13.5 — V –1.8 –1.5 ACX302AK VSSG HV DD 1µF Use a Zener Cext/Rext voltage of 2.7V. (RD2.7UM is recommended ACX302AK ...
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... Vpsig VpsigBK Top/bottom black display portion (letterbox portion) Fig. 2 – 4 – (Vss = 0V) Typ. Max. Unit 0.0 0.3 3.0 5.5 VIH/2 VIH/2 + 0.3 5.5 5.7 VV – 2.0 DD VVC ± 4.0 (however, 10V or less) VVC ± 2.5 VVC ± 2.7 VVC ± 4.0 VVC ± 4.5 VVC – 0.3 VVC – 0.2 VVC ± 4.0V ACX302AK ...
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... Clock input for H shift register drive 19 PSIG Uniformity improvement signal input 20 GREEN Video signal (G) input to panel 21 RED Video signal (R) input to panel 22 BLUE Video signal (B) input to panel H shift register drive direction signal 23 RGT input 24 TESTR Panel test output; no connection – 5 – ACX302AK Description ...
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... REF (5) VST, VCK, EN, REF VV Input REF 350 800 800 1M 1M – 6 – Signal line level shifter and shift register circuit HV DD Level conversion circuit HV DD Level conversion circuit VV DD Level conversion circuit ACX302AK ...
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... DWN, REF Input REF (7) VSSG (8) COM (9) Cext/Rext (10) TEST1/TEST2 350 TEST1 (11) TESTL, TESTR Negative voltage VSSG generation circuit Input 1M Cext/Rext 350 1M TESTL TESTR – 7 – DD Level conversion circuit driver TEST2 1M ACX302AK ...
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... ACX302AK = 12V 25°C) DD Max. Unit 30 30 197 100 100 34 µs –30 100 100 100 100 ns 2600 5600 ...
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... Horizontal Standard Timing HST HCK1 HCK2 FRP VCK 2.5µ WIDE 6 WIDE represents every 1H pulse indicated on the horizontal timing. 5.0µs 1.3µs 3µs 1.1µs 1.9µs – 9 – ACX302AK ...
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... HCKn duty cycle 50% to1Hck = 0ns to2Hck = 0ns 5 • HCKn duty cycle 90% 50% to1Hck = 0ns 10% to2Hck = 0ns tdHst = 167ns tfHckn thHst = 0ns • tdHst = 167ns thHst = 0ns 50% 90% 10% tfWide 50% 50% twWide ACX302AK ...
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... Vertical Standard Timing NTSC 4:3 (in case of EVEN field) VST VCK FRP HST EN WIDE NTSC WIDE (in case of EVEN field) VST VCK FRP HST EN WIDE 8 WIDE represents 1F period indicated on the vertical timing. 8 – 11 – ACX302AK ...
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... VCK duty cycle 50% 50% to1Vck = 0ns to2Vck = 0ns thVst • VCK duty cycle 50% 90% to1Vck = 0ns 10% to2Vck = 0ns tdVst = 32µs tfVck thVst = –32µs 90% • VCK duty cycle 10% 50% to1Vck = 0ns to2Vck = 0ns trEn 50% 50% twEn 90% 10% tfWide 50% 50% 50% to1Wide ACX302AK ...
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... I V60 — — 2.0 Symbol Min. Typ. Max. PWR25 — 60 PWR60 — — Symbol Min. Typ. Max. 0.5 1 Rin – 13 – ACX302AK Unit Conditions — µA HCK1: actual driving — µA HCK2: actual driving — µA HST = GND — ...
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... min. YT1 ≥ 0° 25°C CTK 11 – 14 – ACX302AK (Ta = 25°C, NTSC mode) Typ. Max. Unit Min. 100 200 — 100 200 — 7.7 8.2 — 0.595 0.625 0.655 0.310 0.340 0.370 0.245 ...
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... L (Black): Surface luminance of the panel at V Both luminosities are measured by System I. Luminance Measurement Meter Equipment Optical fiber Surface A LCD panel Light Source Light Source Optical fiber Spectroscope Surface A = 4.0V. AC – 15 – ACX302AK Measurement Light Detector Equipment Surface A: See the Package Outline. = 0.5V. AC ...
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... AC G input B input 4.0 4.0 0.5 4.0 4.0 0.5 0.0 0.0 (Unit and 100 50 and V , 50RG 50BG and V 50R 50G 0 – 16 – ACX302AK – Signal amplitude [ 50RG V 50BG G raster R raster B raster V V 50R 50B V 50G V – Signal amplitude [V] AC ...
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... Vsig = 5.5 ± 4.0 or 5.5 ± 2.0 [V] (shown in the figure to the right) Vcom = 5.20V Input signal voltage (Waveform applied to measured pixels) 4.0V 0.5V 5.5V 0V Optical transmittance output waveform 100% 90% 10 that holds the maximum image retention, AC Black level White level 4.0V 2.0V 5.5V 2.0V 4.0V 0V Vsig waveform – 17 – ACX302AK tON t1 tOFF t2 ton toff (V) ...
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... Wi' – Wi Cross talk value CTK = Wi Standard Unit 2,700 ± 300 cd/m 8,800 K x: 0.285 ± 0.01 y: 0.303 ± 0.01 – 18 – Normal ( = 0° Top Right Surface A 100 [%] Remarks ± 2° dimmer = max ± 2°C, at dimmer = max. ACX302AK 100 [%] ...
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... 880 884 – 19 – Gate SW Gate ACX302AK ...
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... VST VCK (3) Horizontal display period (RGT: high level) BLK HST HCK1 HCK2 1 2 Vertical display period 228H (14.5ms Vertical display period 228H (14.5ms) 294 293 295 Horizontal display period (48.9µs) – 20 – ACX302AK 880 pixels to 227 228 227 228 ...
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... Two methods are applied for the delaying procedure: Sample-and-hold and Delay circuits. These two block diagrams are as follows. The ACX302AK has a right/left inversion function. The following phase relationship diagram indicates the phase setting for right scan (RGT = high level). For left scan (RGT = low level), the phase setting should be inverted for the B and G signals ...
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... Serial data +3.0V PSIG RED GREEN BLUE COM/CS HST HCK1 HCK2 CXA3268AR VST VCK DWN EN RGT REF WIDE Control Circuit – 22 – +12.0V 10k Cext/Rext Cext See page 3 for the value setting. LCD Panel ACX302AK Use a Zener voltage of 2.7V. (RD2.7UM is recommended.) VSSG 1µF ACX302AK ...
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... Do not twist or bend the panel or panel frame. d) Keep the panel away from heat sources not dampen the panel with water or other solvents. f) Avoid storing or using the panel at high temperatures or high humidity, as this may result in panel damage. – 23 – ACX302AK ...
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... ACX302AK ...