AT86RF401E ATMEL [ATMEL Corporation], AT86RF401E Datasheet - Page 26

• Manufacturer Part Number: AT86RF401E
• Description: Smart RF Wireless Data Microtransmitter
• Manufacturer: ATMEL [ATMEL Corporation]

EEPROM Data Memory
Memory Access Times
and Instruction
Execution Timing
26
AT86RF401
The AT86RF401 contains 128 bytes of data EEPROM memory. It is organized as a sep-
arate data space in which single bytes can be read and written. The access between the
EEPROM and the CPU is described in the Memory Programming section (page 13).
This section describes the general access timing concepts for instruction execution and
internal memory access.
The AVR CPU is driven by the System Clock Ø generated from the main oscillator for
the chip. A programmable clock divider generates this clock from the crystal oscillator
input.
Figure 22 shows the parallel instruction fetches and instruction executions enabled by
the Harvard architecture and the fast-access register file concept. This is the basic pipe-
lining concept to obtain up to 1 MIPS per MHz with the corresponding unique results for
functions per cost, functions per clocks and functions per power unit.
Figure 22. The Parallel Instruction Fetches and Instruction Executions
Figure 23 shows the internal timing concept for the register file. In a single clock cycle,
an ALU operation using two register operands is executed, and the result is stored back
to the destination register.
Figure 23. Single Cycle ALU Operation
Register Operands Fetch
ALU Operation Execute
2nd Instruction Execute
3rd Instruction Execute
1st Instruction Execute
2nd Instruction Fetch
Total Execution Time
3rd Instruction Fetch
4th Instruction Fetch
1st Instruction Fetch
Result Write Back
System Clock Ø
System Clock Ø
T1
T1
T2
T2
T3
T3
1424F–RKE–12/03
T4
T4