HI-8683PDI HOLTIC [Holt Integrated Circuits], HI-8683PDI Datasheet
HI-8683PDI
Related parts for HI-8683PDI
HI-8683PDI Summary of contents
Page 1
... HI-8482 or HI-8588 between the ARINC bus and the device inputs. The HI-8684 incorporates the digital logic and analog line receiver circuitry in a single device. The HI-8683 is also available as a second source to the DLS-112 with the original 18 pin DIP and 28 pin PLCC package pinouts ...
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... Parity Enable - A high level activates odd parity checking which replaces the 32nd ARINC bit with an error bit. Otherwise, the 32nd ARINC bit is unchanged Error Flag. A high level indicates a bit count error (number of ARINC bits was less than or greater than 32) and/or a parity error if parity detection was enabled ...
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... INA and INB inputs and the resulting One/Zero data is shifted into a 32-bit input register as illustrated in Figure 3. In the HI-8684, the One/Zero data shifted into the input reg- ister is created from either the two digital outputs of the built- in line receiver (Figure 3) or the TESTA and TESTB inputs (Figure 4) ...
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... RESET is pulsed low. READING RECEIVE BUFFER When the data word is transferred to the receive buffer, the DATA RDY pin goes high. The data word can then be read in four 8-bit bytes by pulsing the READ cated in Figure 5. The first read cycle resets DATA RDY low and increments an internal counter to the next 8-bit byte ...
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... TIMING DIAGRAMS INA (HI-8683 only) INB (HI-8683 only) VDIFF RINA - RINB (HI-8684 only) DERIVED DATA DERIVED CLOCK FIGURE 3 - RECEIVER INPUT TIMING FOR ARINC 429 TESTA TESTB DERIVED DATA DERIVED CLOCK FIGURE 4 - TEST INPUT TIMING FOR ARINC 429 32nd DERIVED DATA ARINC Bit ...
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... Leads ................................ +280°C for 10 sec Package body .....................................+220°C Storage Temperature ............. -65°C to +150°C DC ELECTRICAL CHARACTERISTICS Vcc = 5V, GND = 0V Operating Temperature Range (unless otherwise specified). PARAMETERS ARINC Bus Inputs (RINA & RINB, HI-8684 only) Differential input voltage one or zero null common mode Input resistance ...
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... READ pulse width Data delay from READ READ to data floating READ to DATA RDY clear READ pulse to next READ pulse GAPCLK frequency 32 ARINC bit to DATA RDY HI-8683, HI-8684 SYMBOL TEST CONDITIONS READ , PARITY ENA, TESTA & TESTB 5. 0.0V ...
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... HI-8684PJT-10 20 PIN PLASTIC PLCC HI-8684PSI-10 20 PIN PLASTIC SOIC - WB HI-8684PST-10 20 PIN PLASTIC SOIC - WB Legend Wide Body HI-8683, HI-8684 DATA RDY D6 GAPCLK RESET INB 4 15 HI-8683PDI D4 INA 5 14 HI-8683PDT ERROR PARITY ENB D1 READ 8 11 GND HI-8683 18-Pin Plastic DIP ...
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... PLASTIC SMALL OUTLINE (SOIC (Wide Body) .454 ± .008 (11.531 ± .203) .4065 ± .0125 (10.325 ± .318) .050 TYP (1.27) HI-8683, HI-8684 PACKAGE DIMENSIONS .905 .015 (22.99 .381) .135 .015 (3.429 .381 .100 .010 .004 (2.540 ...
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... SQ. .152 ± .002 (.3.861 ± .051) .020 MIN .320 ± .010 (.508 MIN) (8.128 ± .254) HI-8683, HI-8684 PACKAGE DIMENSIONS .296 ± .003 (7.518 ± .076) .018 TYP (.457) 0° to 8° .033 ± .017 (.838 ± .432) PIN NO. 1 IDENT .026 ± ...