SX1210 SEMTECH [Semtech Corporation], SX1210 Datasheet - Page 36
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SX1210
Manufacturer Part Number
SX1210
Description
Ultra-Low Power Integrated UHF Receiver
Manufacturer
SEMTECH [Semtech Corporation]
Datasheet
1.SX1210.pdf
(73 pages)
- Current page: 36 of 73
- Download datasheet (2Mb)
If the bit synchronizer is disabled, the raw demodulator output is made directly available on DATA pin and no DCLK
signal is provided.
Conversely, if the bit synchronizer is enabled, synchronous cleaned data and clock are made available respectively
on DATA and IRQ_1 pins. DATA is sampled on the rising edge of DCLK and updated on the falling edge as
illustrated in Figure 28.
Note that in Continuous mode it is always recommended to enable the bit synchronizer to clean the DATA signal
even if the DCLK signal is not used by the uC. (bit synchronizer is automatically enabled in Buffered and Packet
mode).
The tables below give the description of the interrupts available in Continuous mode.
Table 15: Interrupt Mapping in Continuous Rx Mode
Note: In Continuous mode, no interrupt is available in Stby mode
Rev 2– Sept 8
ADVANCED COMMUNICATIONS & SENSING
5.3.2. Rx Processing
5.3.3. Interrupt Signals Mapping
th
, 2008
DATA (NRZ)
DCLK
IRQ_0
Figure 28: Rx Processing in Continuous Mode
IRQ_1
Rx_stby_irq_0
00 (d)
01
1x
Page 36 of 73
Rx
DCLK
Sync
RSSI
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SX1210
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