CY7C1019CV33-12BVXI Cypress Semiconductor Corporation., CY7C1019CV33-12BVXI Datasheet
CY7C1019CV33-12BVXI
Manufacturer Part Number
CY7C1019CV33-12BVXI
Description
Manufacturer
Cypress Semiconductor Corporation.
Specifications of CY7C1019CV33-12BVXI
Case
BGA
Date_code
0607+
Features
■
■
■
■
■
■
■
■
■
Cypress Semiconductor Corporation
Document Number: 001-08353 Rev. *C
Logic Block Diagram
High speed
❐
Low active power
❐
Low CMOS standby power
❐
Operating voltages of 3.3 ± 0.3V
2.0V data retention
Automatic power down when deselected
TTL compatible inputs and outputs
Easy memory expansion with CE
Available in Pb-free standard 119-ball PBGA
t
I
I
AA
CC
SB2
= 10 ns
= 175 mA at 10 ns
= 25 mA
A
(9:0)
1
, CE
2
, and CE
•
198 Champion Court
3
features
INPUT BUFFER
A
DECODER
COLUMN
128K x 24
(16:10)
ARRAY
Functional Description
The CY7C1024DV33 is a high performance CMOS static RAM
organized as 128K words by 24 bits. This device has an
automatic power down feature that significantly reduces power
consumption when deselected.
To write to the device, enable the chip (CE
and CE
To read from the device, enable the chip by taking CE
HIGH, and CE
and the Write Enable (WE) HIGH. See the
7 for a complete description of Read and Write modes.
The 24 I/O pins (I/O
state when the device is deselected (CE
CE
write operation. (CE
LOW).
3
CONTROL LOGIC
HIGH) or when the output enable (OE) is HIGH during a
•
3
LOW), while forcing the Write Enable (WE) input LOW.
3-Mbit (128K X 24) Static RAM
San Jose
3
LOW while forcing the Output Enable (OE) LOW
0
1
,
to I/O
CA 95134-1709
LOW, CE
CE
WE
OE
1
, CE
23
) are placed in a high impedance
2
I/O
, CE
2
0
HIGH, CE
– I/O
3
Revised November 6, 2008
CY7C1024DV33
23
1
HIGH, CE
Truth Table
•
1
LOW, CE
3
LOW, and WE
408-943-2600
1
2
LOW, CE
LOW, or
on page
2
HIGH,
2
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