K4H560438J SAMSUNG [Samsung semiconductor], K4H560438J Datasheet - Page 20

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K4H560438J

Manufacturer Part Number
K4H560438J
Description
256Mb J-die DDR SDRAM Specification
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
22.0 System Notes
a. Pullup slew rate is characteristized under the test conditions as shown in Figure 2.
b. Pulldown slew rate is measured under the test conditions shown in Figure 3.
c. Pullup slew rate is measured between (V
d. Evaluation conditions
e. The ratio of pullup slew rate to pulldown slew rate is specified for the same temperature and voltage, over the entire temperature and
f. Verified under typical conditions for qualification purposes.
g. TSOPII package divices only.
h. Only intended for operation up to 266 Mbps per pin.
i. A derating factor will be used to increase tIS and tIH in the case where the input slew rate is below 0.5V/ns
j. A derating factor will be used to increase tDS and tDH in the case where DQ, DM, and DQS slew rates differ, as shown in Tables 3 & 4.
k. Table 3 is used to increase tDS and tDH in the case where the I/O slew rate is below 0.5 V/ns. The I/O slew rate is based on the lesser
l. DQS, DM, and DQ input slew rate is specified to prevent double clocking of data and preserve setup and hold times. Signal transi
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For example : If Slew Rate 1 is 0.5 V/ns and slew Rate 2 is 0.4 V/ns, then the delta rise, fall rate is - 0.5ns/V . Using the table given, this
as shown in Table 2. The Input slew rate is based on the lesser of the slew rates detemined by either V
slew rates determined by either V
The delta rise/fall rate is calculated as:
{1/(Slew Rate1)} - {1/(Slew Rate2)}
would result in the need for an increase in tDS and tDH of 100 ps.
V
Input slew rate is based on the larger of AC-AC delta rise, fall rate and DC-DC delta rise, Input slew rate is based on the lesser of the
voltage range. For a given output, it represents the maximum difference between pullup and pulldown drivers due to process variation.
Pulldown slew rate is measured between (V
Pullup and Pulldown slew rate conditions are to be met for any pattern of data, including all outputs switching and only one output
switching.
Example : For typical slew rate, DQ0 is switching
Typical
Minimum : 70 °C (T Ambient), V
Maximum : 0 °C (T Ambient), V
on the lesser of the AC - AC slew rate and the DC- DC slew rate. The inut slew rate is based on the lesser of the slew rates deter
mined by either V
tions through the DC region must be monotonic.
IH
(DC) to V
: 25 °C (T Ambient), V
For minmum slew rate, all DQ bits are switching from either high to low, or low to high.
The remaining DQ bits remain the same as for previous state.
IL
(DC), similarly for rising transitions.
IH
(AC) to V
IL
(AC) or V
DDQ
DDQ
DDQ
IH
(AC) to V
= 2.5V(for DDR266/333) and 2.6V(for DDR400), typical process
= 2.3V(for DDR266/333) and 2.5V(for DDR400), slow - slow process
= 2.7V(for DDR266/333) and 2.7V(for DDR400), fast - fast process
IH
DDQ
(DC) to V
DDQ
IL
/2 - 320 mV +/- 250 mV)
(AC) or V
/2 + 320 mV +/- 250 mV)
Output
Output
Figure 3 : Pulldown slew rate test load
IL
Figure 2 : Pullup slew rate test load
(DC), and similarly for rising transitions.
IH
(DC) to V
20 of 24
IL
V
(DC), similarly for rising transitions.
V
DDQ
SSQ
50Ω
50Ω
Test point
Test point
Rev. 1.12 August 2008
IH
(AC) to V
DDR SDRAM
IL
(AC) or

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