SSD1820ATR1 ETC1 [List of Unclassifed Manufacturers], SSD1820ATR1 Datasheet
SSD1820ATR1
Available stocks
Related parts for SSD1820ATR1
SSD1820ATR1 Summary of contents
Page 1
... This document contains information on a new product. Specifications and information herein are subject to change without notice. Copyright © 2002/2003 Solomon Systech Limited. SSD1820A SSD1821 TAB Gold Bump Die ORDERING INFORMATION SSD1820AZ Gold Bump Die SSD1821Z Gold Bump Die SSD1820ATR1 TAB SSD1821TR1 TAB REV 1.4 01/03 ...
Page 2
Generator Oscillator RES PS0 PS1 SSD1820A/21 REV 1.4 01/03 2 Block Diagram COM0 to COM63/79 SEG0~SEG127 ICONS HV Buffer Cell Level Shifter 193 Bit Latch (SSD1820A) 209 Bit Latch (SSD 1821) Display Timing GDDRAM ...
Page 3
N/C 1 PS1 2 /CS 3 /RES 4 D/C 5 R/W (/WR (/RD VDD 16 VSS 17 VCC 18 C3P 19 ...
Page 4
N VL6 4 VL5 5 VL4 6 VL3 7 VL2 8 INTRS 9 C4P 10 C2N 11 C2P 12 C1P 13 C1N 14 C3P 15 C5P 16 VCC 17 VSS 18 VCI 19 VDD 20 ...
Page 5
SOLOMON 144 115 COM5 COM4 COM3 COM2 COM1 COM0 ICONS SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 : : : : : : : : : : : : : : : : ...
Page 6
SSD1820A/21 REV 1.4 01/03 6 115 144 COM5 COM4 COM3 COM2 COM1 COM0 ICONS SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 : : : : : : : : : : : : ...
Page 7
Center (-3926.1, 120) Center (-4095, -64.65) Center (4263, -64.65) Notes: 1. Diagram showing the gold bump view of the die. 2. Coordinates are reference to center of the chip 3. Unit of coordinates and Size of ...
Page 8
SSD1820A/21Z Die Pad Coordinates Pad# SSD1820A SSD1821 x-pos y-pos Pad# SSD1820A SSD1821 1 N/C COM73 -4568.40 -773.40 116 2 N/C COM74 -4503.60 -773.40 117 3 N/C COM75 -4438.80 -773.40 118 4 N/C COM76 -4374.00 -773.40 119 5 N/C COM77 -4309.20 ...
Page 9
SSD1820A/21Z Die Pad Coordinates 72 C1P C1P 1044.60 -780.75 73 C2P C2P 1125.90 -780.75 74 C2P C2P 1207.20 -780.75 75 C2P C2P 1288.50 -780.75 76 C2N C2N 1405.20 -780.75 77 C2N C2N 1481.40 -780.75 78 C2N C2N 1557.60 -780.75 79 ...
Page 10
PIN DESCRIPTIONS RES This pin is reset signal input. When the pin is low, initialization of the chip is executed. PS0 This pin use together with PS1 to determine the interface proto- col between the driver and MCU. Refer to ...
Page 11
and LCD driving voltages. They can be supplied externally or gener- ated by the internal bias divider. They have the following relation- ship: V > V > V > V ...
Page 12
Command Decoder and Command Interface This module determines whether the input data is interpreted as data or command. Data is directed to this module based upon the input of the D/C pin. If D/C is high, data is written to ...
Page 13
Column address 00H (7FH) Segment Remap Enabled LSB [D0] Page 0 MSB [D7] LSB Page 1 MSB LSB Page 2 MSB LSB Page 3 MSB LSB Page 4 MSB LSB Page 5 MSB LSB Page 6 MSB LSB Page 7 ...
Page 14
Column address 00H (7FH) Segment Remap Enabled Page 0 Page 1 Page 2 Page 3 Page 4 Page 5 Page 6 Page 7 Page 8 Page 9 Page 10 (LSB) SEG 0 Note: The configuration in parentheses represent the remapping ...
Page 15
Oscillator Circuit This module is an On-Chip low power RC oscillator circuitry (Figure 7). The oscillator generates the clock for the DC-DC voltage converter. This clock is also used in the Display Timing Generator. LCD Driving Voltage Generator and Regulator ...
Page 16
HV Buffer Cell (Level Shifter) HV Buffer Cell works as a level shifter which translates the low voltage output signal to the required driving voltage. The output is shifted out with an internal FRM clock which comes from the Display ...
Page 17
LCD Panel Driving Waveform The following is an example of how the Common and Segment drivers may be connected to a LCD panel. The waveforms shown in Figure 8a and 7b illustrate the desired multiplex scheme with N-line Inversion feature ...
Page 18
COMMAND TABLE Hex 00~ 10~ 18~1F 20~ 28~ 30~3F 40~ ...
Page 19
82~9F A0~ A2~ A4~ ...
Page 20
E9~EF F0~ EXTENDED COMMAND TABLE Bit Pattern Command 11110001 00001X 11110010 X ...
Page 21
Description. To write data to the GDDRAM, input Low to R /W(W R) pin and High pin for 6800-series parallel mode. For serial interface, it will always be in write mode. GDDRAM column address pointer will ...
Page 22
Command Description Set Display On/Off This command turns the display on/off, by the value of the LSB. Set Display Start Line This command is to set Display Start Line register to deter- mine starting address of display RAM to be ...
Page 23
Set Contrast Control Register This command adjusts the contrast of the LCD panel by changing VL6 of the LCD drive voltage provided by the On-Chip power circuits. VL6 is set with 64 steps (6-bit) contrast control register ...
Page 24
MAXIMUM RATINGS* (Voltages Referenced to V Symbol Parameter V Supply Voltage Booster Supply Voltage CI V Input Voltage in I Current Drain Per Pin Excluding V T Operating Temperature A T Storage Temperature Range stg * ...
Page 25
V Output High Voltage ( OH1 Output Low Voltage ( OL1 0 7 VL6 LCD Driving Voltage Source (VL6 Pin) VL6 LCD Driving Voltage Source (VL6 Pin) V Input high voltage IH1 (RES, ...
Page 26
AC ELECTRICAL CHARACTERISTICS (T Symbol Parameter F Oscillation Frequency of Display Timing Generator OSC (SSD1820A/21) F Frame Frequency OSC (SSD1820A) Frame Frequency F OSC (SSD1821) SSD1820A/21 REV 1.4 01/03 26 ...
Page 27
TABLE 3a. Parallel Timing Characteristics (T Symbol t Clock Cycle Time (write cycle) cycle t Address Setup Time AS t Address Hold Time AH t Write Data Setup Time DSW t Write Data Hold Time DHW t Read Data Hold ...
Page 28
TABLE 3b. Parallel Timing Characteristics (T Symbol t Clock Cycle Time (write cycle) cycle t Address Setup Time AS t Address Hold Time AH t Write Data Setup Time DSW t Write Data Hold Time DHW t Read Data Hold ...
Page 29
TABLE 4a. Parallel Timing Characteristics (T Symbol t Clock Cycle Time (write cycle) cycle t Address Setup Time AS t Address Hold Time AH t Write Data Setup Time DSW t Write Data Hold Time DHW t Read Data Hold ...
Page 30
TABLE 4b. Parallel Timing Characteristics (T Symbol t Clock Cycle Time (write cycle) cycle t Address Setup Time AS t Address Hold Time AH t Write Data Setup Time DSW t Write Data Hold Time DHW t Read Data Hold ...
Page 31
TABLE 5a. Serial Timing Characteristics (T Symbol t Clock Cycle Time cycle t Address Setup Time AS t Address Hold Time AH t Chip Select Setup Time CSS t Chip Select Hold Time CSH t Write Data Setup Time DSW ...
Page 32
TABLE 5b. Serial Timing Characteristics (T Symbol t Clock Cycle Time cycle t Address Setup Time AS t Address Hold Time AH t Chip Select Setup Time CSS t Chip Select Hold Time CSH t Write Data Setup Time DSW ...
Page 33
Application Circuit: Bias divider enabled with external V ICONS COM0 : COM6 COM7 : COM32 COM33 : COM39 Remapped COM SCAN Direction [Command: C8 COM47 COM48 : : Remapped COM : SCAN Direction COM52 [Command: C8] COM53 : ...
Page 34
Application Circuit: 4X Booster, Bias divider disabled. ICONS COM0 : COM6 COM7 : COM32 COM33 : COM39 Remapped COM SCAN Direction [Command: C8 COM47 COM48 : : Remapped COM : SCAN Direction COM52 [Command: C8] COM53 : : ...
Page 35
Application Circuit: DC-DC Converter Circuit Configuration SSD1820A and SSD1821 IC work from and DC-DC converter respectively. For the capactior connections, please refer to below circuit diagrams. Note that if the capacitor connection does not ...
Page 36
APPLICATION NOTE 1: ESD PROTECTION CIRCUIT For SSD1820A/21 IC recommended to design a simple protection circuit to prevent from unexpected external interference. This is useful especially the designed product has to go through unexpected electrostatic discharge. Figure 1 ...
Page 37
NOTES 1. GENERAL TOLERANCE: ±0.050MM 2. ALL CHAMFER IS R0.20 3. MATERIAL PI: UPILEX-S 75um+6 THICKNESS ADHESIVE: TORAY #7100 12um±2 THICKNESS CU: FQ-VLP 18um FLEX COATING: FS-100 SOLDER RESIST: AE-70-M11 26±14um 4. PLATING SN: 0.35±0.05um 5. OPTIONAL FEATURE FOR SSL ...
Page 38
SSD1820A/21 REV 1.4 01/03 38 SSD1820AT TAB PACKAGE DIMENSION ( NOT SCALE THIS DRAWING SOLOMON ...
Page 39
SOLOMON SSD1820AT TAB PACKAGE DIMENSION ( NOT SCALE THIS DRAWING REV 1.4 SSD1820A/21 01/03 39 ...
Page 40
NOTES 1. GENERAL TOLERANCE: ±0.050MM 2. ALL CHAMFER IS R0.20 3. MATERIAL PI: UPILEX-S 75um+6 THICKNESS ADHESIVE: TORAY #7100 12 ± 2um THICKNESS CU: FQ-VLP 25um ± 5um FLEX COATING: FS-100L SOLDER RESIST: AR-7100 26 ± 14um GENERAL TOLERANCE ± ...
Page 41
SOLOMON SSD1821T TAB PACKAGE DIMENSION ( NOT SCALE THIS DRAWING REV 1.4 SSD1820A/21 01/03 41 ...
Page 42
SSD1820A/21 REV 1.4 01/03 42 SSD1821T TAB PACKAGE DIMENSION ( NOT SCALE THIS DRAWING SOLOMON ...
Page 43
Solomon Systech reserves the right to make changes without further notice to any products herein. Solomon Systech makes no warranty, representation or guar- antee regarding the suitability of its products for any particular purpose, nor does Solomon Systech assume any ...