LRI64-A1T STMICROELECTRONICS [STMicroelectronics], LRI64-A1T Datasheet - Page 31
LRI64-A1T
Manufacturer Part Number
LRI64-A1T
Description
Memory TAG IC at 13.56 MHz, with 64-bit Unique ID and WORM user area, ISO15693 and ISO18000-3 Mode 1 compliant
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.LRI64-A1T.pdf
(52 pages)
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LRI64
17.3
VCD new request delay when there is no LRI64 response, t
t
response has been received.
The EOF sent by the VCD is 10% modulated, independent of the modulation index used for
transmitting the VCD request to the LRI64.
From the time the VCD has generated the rising edge of an EOF:
3
is the time after which the VCD may send an EOF to switch to the next slot when no LRI64
The VCD waits for a time at least equal to the sum of t
time of an LRI64, which depends on the data rate and subcarrier modulation mode,
before sending a subsequent EOF.
3
(min) and the typical response
Timing definitions
31/52
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