CYM9260 CYPRESS [Cypress Semiconductor], CYM9260 Datasheet - Page 7
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CYM9260
Manufacturer Part Number
CYM9260
Description
64K(128K, 256K, 512K) x 72 SRAM Module
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CYM9260.pdf
(12 pages)
AC Test Loads and Waveforms
Document #: 38-05002 Rev. **
OUTPUT
Switching Characteristics
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Notes:
CYC
CH
CL
AS
AH
CDV
DOH
ADS
ADSH
WES
WEH
DS
DH
CSS
CSH
EOZ
EOV
3.
2.
4.
Parameter
Resistor values for V
Unless otherwise noted, test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output
loading of the specified I
t
EOZ
is specified with a load capacitance of 5 pF as in part (b) of AC Test Loads. Transition is measured ± 500 mV from steady-state voltage.
Clock Cycle Time
Clock HIGH
Clock LOW
Address Set-Up Before CLK Rise
Address Hold After CLK Rise
Data Output Valid After CLK Rise
Data Output Hold After CLK Rise
ADSP, ADSC Set-Up Before CLK Rise
ADSP, ADSC Hold After CLK Rise
WH, WL Set-Up Before CLK Rise
WH, WL Hold After CLK Rise
Data Input Set-Up Before CLK Rise
Data Input Hold After CLK Rise
Chip Select Set-Up
Chip Select Hold After CLK Rise
OE HIGH to Output High Z
OE LOW to Output Valid
CCQ
(a)
= 3.3V are R1 = 317 and R2 = 351 .
V
OL
L
/I
OH
=1.5V
and load capacitance. Shown in (a) and (b) of AC Test Loads. All measurements are made at room temperature.
R
L
= 50
Over the Operating Range
[3]
OUTPUT
Description
[4]
V
INCLUDING
CCQ
JIG AND
SCOPE
5 pF
(b)
R1
[2]
R2
GND
3.3V
3 ns
Min.
0. 5
3.1
0.5
3.1
3.1
0.5
3.3
0.5
3.1
0.5
15
6
6
3
7
10%
66 MHz
CYM9260/61/62/63
Max.
10.3
ALL INPUT PULSES
7
90%
Min.
3.1
0.5
3.1
0.5
3.1
0.5
3.3
0.5
3.1
0.5
20
8
7
8
3
50 MHz
CYM9261B
CYM9262A
Max.
14
90%
7
CYM9263
Page 7 of 12
10%
3 ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns