GS82032A ETC1 [List of Unclassifed Manufacturers], GS82032A Datasheet - Page 8

• Manufacturer Part Number: GS82032A
• Description: 2M Synchronous Burst SRAM
• Manufacturer: ETC1 [List of Unclassifed Manufacturers]

Notes:
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Rev: 1.03 2/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Simplified State Diagram with G
The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from Read cycles to Write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal Read cycles.
Transitions shown in grey tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.
X
X
CW
First Write
Burst Write
W
W
CW
8/23
W
CR
R
CR
R
Deselect
X
CW
W
CW
W
R
GS820E32T/Q-150/138/133/117/100/66
CR
First Read
Burst Read
R
R
CR
X
X
© 1999, Giga Semiconductor, Inc.
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