ACE24C32_1 ACE [ACE Technology Co., LTD.], ACE24C32_1 Datasheet - Page 6

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ACE24C32_1

Manufacturer Part Number
ACE24C32_1
Description
Two-wire Serial EEPROM
Manufacturer
ACE [ACE Technology Co., LTD.]
Datasheet
 
                                                                                                                                                           
                                             
Device Operation
Clock and Data Transitions:
during SCL low time periods (refer to Figure 4). Data changes during SCL high periods will indicate a
start or stop condition as defined below.
Start Condition:
command (refer to Figure 5).
Stop Condition:
will place the EEPROM in a standby power mode (refer to Figure 5).
Acknowledge:
EEPROM sends a zero during the ninth clock cycle to acknowledge that it has received each word.
Standby Mode :
after the receipt of the stop bit and the completion of any internal operations.
Memory Reset :
these steps:
1. Clock up to 9 cycles.
2. Look for SDA high in each cycle while SCL is high and then.
3. Create a start condition as SDA is high.
Bus Timing
All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The
The ACE24C32/64 features a low-power standby mode which is enabled: (a) upon power-up and (b)
After an interruption in protocol power loss or system reset, any two-wire part can be protocol reset by following
The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only
A high-to-low transition of SDA with SCL high is a start condition which must precede any other
A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop command
Figure 2.SCL: Serial Clock, SDA: Serial Data I/O
Technology
Two-wire Serial EEPROM
ACE24C32/64
VER 1.3
6

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