54F574DM NSC [National Semiconductor], 54F574DM Datasheet - Page 2

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54F574DM

Manufacturer Part Number
54F574DM
Description
Octal D-Type Flip-Flop with TRI-STATE Outputs
Manufacturer
NSC [National Semiconductor]
Datasheet

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Connection Diagrams
Functional Description
The ’F574 consists of eight edge-triggered flip-flops with in-
dividual D-type inputs and TRI-STATE true outputs The
buffered clock and buffered Output Enable are common to
all flip-flops The eight flip-flops will store the state of their
individual D inputs that meet the setup and hold times re-
quirements on the LOW-to-HIGH Clock (CP) transition With
the Output Enable (OE) LOW the contents of the eight flip-
flops are available at the outputs When OE is HIGH the
outputs go to the high impedance state Operation of the
OE input does not affect the state of the flip-flops
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
for DIP SOIC and Flatpak
Pin Assignment
TL F 9567–2
2
H
L
X
Z
NC
OE
e
e
e
H
H
H
H
e
L
L
L
L
e
e
LOW Voltage Level
High Impedance
HIGH Voltage Level
Immaterial
Inputs
No Change
LOW-to-HIGH Transition
CP
H
H
H
H
D
H
H
H
H
L
L
L
L
Internal
NC
NC
NC
NC
Q
H
H
L
L
Pin Assignment
Function Table
for LCC
Outputs
NC
NC
O
H
Z
Z
Z
Z
L
Hold
Hold
Load
Load
Data Available
Data Available
No Change in Data
No Change in Data
Function
TL F 9567– 3
TL F 9567– 5

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