HX6356 ETC1 [List of Unclassifed Manufacturers], HX6356 Datasheet - Page 2

• Manufacturer Part Number: HX6356
• Description: 32K x 8 STATIC RAM-SOI
• Manufacturer: ETC1 [List of Unclassifed Manufacturers]

HX6356
FUNCTIONAL DIAGRAM
SIGNAL DEFINITIONS
A: 0-14
DQ: 0-7
NCS
NWE
NOE
CE
TRUTH TABLE
NCS
H
X
L
L
CE
NCS
NWE
NOE
A:9-11, 14
A:0-8,12-13
Address input pins which select a particular eight-bit word within the memory array.
Bidirectional data pins which serve as data outputs during a read operation and as data inputs during a write
operation.
Negative chip select, when at a low level allows normal read or write operation. When at a high level NCS
forces the SRAM to a precharge condition, holds the data output drivers in a high impedance state and
disables all input buffers except CE. If this signal is not used it must be connected to VSS.
Negative write enable, when at a low level activates a write operation and holds the data output drivers in a
high impedance state. When at a high level NWE allows normal read operation.
Negative output enable, when at a high level holds the data output drivers in a high impedance state. When
at a low level, the data output driver state is defined by NCS, NWE and CE. If this signal is not used it must
be connected to VSS.
Chip enable, when at a high level allows normal operation. When at a low level CE forces the SRAM to a
precharge condition, holds the data output drivers in a high impedance state and disables all the input buffers
except the NCS input buffer. If this signal is not used it must be connected to VDD.
CE
H
H
X
L
NWE
XX
XX
H
L
4
11
NOE
XX
XX
X
L
Decoder
Deselected
Row
Disabled
MODE
Read
Write
WE • CS • CE
NWE • CS • CE • OE
(0 = high Z)
2
•
•
•
Data Out
Data In
High Z
High Z
DQ
Column Decoder
Data Input/Output
32,768 x 8
Memory
•
Array
NOE=H: High Z output state maintained for
•
Notes:
XX: VSS≤VI≤VDD
X: VI=VIH or VIL
•
NCS=X, CE=X, NWE=X
Signal
All controls must be
enabled for a signal to
pass. (#: number of
buffers, default = 1)
8
#
1 = enabled
8
Signal
DQ:0-7