EDD12322GBH-6ETS-F ELPIDA [Elpida Memory], EDD12322GBH-6ETS-F Datasheet - Page 27

• Manufacturer Part Number: EDD12322GBH-6ETS-F
• Manufacturer: ELPIDA [Elpida Memory]

Write Operation
The burst length (BL) and the burst type (BT) of the mode register are referred when a write command is issued.
The burst length (BL) determines the length of a sequential data input by the write command that can be set to 2, 4,8
or 16. The latency from write command to data input is fixed to 1. The starting address of the burst write is defined
by the column address, the bank select address (See “Pin Function”) in the cycle when the write command is issued.
DQS should be input as the strobe for the input-data and DM as well during burst operation. tWPRE prior to the first
rising edge of DQS, DQS must be set to low. tWPST after the last falling edge of DQS, the DQS pins can be
changed to high-Z. The leading low period of DQS is referred as write preamble. The last low period of DQS is
referred as write postamble.
Preliminary Data Sheet E1530E20 (Ver. 2.0)
Command
DQS
DQ
Address
/CK
CK
Command
NOP
DQS
/CK
DQ
CK
Row
ACT
READ
BL = 16
BL = 2
BL = 4
BL = 8
t0
tRCD
NOP
t0.5
t1
Read Operation (/CAS Latency)
Column
WRIT
tRPRE
t1.5
tWPRE
Write Operation
tAC,tDQSCK
t2
in0
in0
in0
in0
27
in1
in1
in1
in1
t2.5
NOP
in2
in2
in2
t3
out0
in3
in3
in3
tWPST
t3.5
out1
in4 in5
in4
NOP
in5
t4
out2
in6
in6
t4.5
out3
EDD12322GBH-TS
in7
in7
tRPST
t5
t5.5
BL: Burst length
14
in
VTT
VTT
15
in