LUCW3000CCN AGERE [Agere Systems], LUCW3000CCN Datasheet - Page 16

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LUCW3000CCN

Manufacturer Part Number
LUCW3000CCN
Description
W3000 PLL Dual-Band Frequency Synthesizer
Manufacturer
AGERE [Agere Systems]
Datasheet

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LUCW3000CCN
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W3000 PLL Dual-Band Frequency Synthesizer
MAIN Register
Table 21. M1:M11: Programmable Main Counter Divide Ratio (Bits 9 to 19)
The main counter divides the frequency of the prescaler output signal and sources the divided signal to the
phase comparator.
Table 22. EN2: Synthesizer Enable (Bit 22)
The REF register also contains an enable bit, EN1 (see Table 16). The W3000 is enabled or powered down with
either the REF or MAIN register, whichever was programmed more recently. The contents of the MAIN and REF
registers are maintained in powerdown mode, providing supply voltages are maintained.
Table 23. B: Band Select (Bit 23)
In dual-band operation, this bit allows the use of one loop filter by setting the charge pump current to correspond
to the frequency of the band selected. See Table 12 for the available charge pump current settings.
16
Bit 19
PWRDN
M11
0
0
0
1
.
.
.
.
.
.
H
H
B
L
L
0
1
Bit 18
M10
0
0
0
1
.
.
.
.
.
.
EN2
0
1
0
1
Bit 17
M9
(continued)
Band 1
Band 2
0
0
0
1
.
.
.
.
.
.
Band
Bit 16
Powerdown
Powerdown
Powerdown
M8
0
0
1
1
.
.
.
.
.
.
Enable
Mode
Bit 15
M7
0
0
1
1
.
.
.
.
.
.
Bit 14
M6
0
0
1
1
.
.
.
.
.
.
Bit 13
M5
0
0
1
1
.
.
.
.
.
.
Bit 12
M4
0
0
1
1
.
.
.
.
.
.
Bit 11
M3
0
0
1
1
.
.
.
.
.
.
Bit 10
M2
1
1
1
1
.
.
.
.
.
.
Advance Data Sheet
Lucent Technologies Inc.
Bit 9
M1
0
1
1
1
.
.
.
.
.
.
December 1999
Divide
Ratio
2047
255
M
2
3
.
.
.
.
.
.

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