ADV3000-EVALZ AD [Analog Devices], ADV3000-EVALZ Datasheet
ADV3000-EVALZ
Related parts for ADV3000-EVALZ
ADV3000-EVALZ Summary of contents
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... Outputs can be set to a high impedance state to reduce the power dissipation and/or to allow the construction of larger arrays using the wire-OR technique. The ADV3000 is provided in an 80-lead LQFP, Pb-free, surface- mount package, specified to operate over the −40°C to +85°C temperature range. ...
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... ADV3000 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 Thermal Resistance ...................................................................... 5 Maximum Power Dissipation ..................................................... 5 ESD Caution.................................................................................. 5 Pin Configuration and Function Descriptions............................. 6 Typical Performance Characteristics ............................................. 8 Theory of Operation ...................................................................... 12 Introduction ................................................................................ 12 Input Channels............................................................................ 12 Output Channels ........................................................................ 12 Auxiliary Switch.......................................................................... 13 Serial Control Interface ...
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... Outputs enabled, maximum pre-emphasis 4 Input termination on Output termination on, no pre-emphasis Output termination on, maximum pre-emphasis Outputs disabled Outputs enabled, no pre-emphasis Outputs enabled, maximum pre-emphasis High speed switching register: HS_CH All other configuration registers Rev Page ADV3000 Min Typ Max Unit 2.25 Gbps − (p-p) ...
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... Differential interpair skew is measured between the TMDS pairs of a single link. 2 ADV3000 output meets the transmitter eye diagram as defined in the DVI Standard Revision 1.0 and the HDMI Standard Revision 1.3. 3 Cable output meets the receiver eye diagram mask as defined in the DVI Standard Revision 1.0 and the HDMI Standard Revision 1.3. ...
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... AVCC + 0.6 V 80-Lead LQFP 5.5 V 2.2 W MAXIMUM POWER DISSIPATION AVCC − 1.4 V < V < IN The maximum power that can be safely dissipated by the ADV3000 AVCC + 0 limited by the associated rise in junction temperature. The 2.0 V maximum safe junction temperature for plastic encapsulated DVEE − 0.3 V < V < IN AMUXVCC + 0.6 V devices is determined by the glass transition temperature of the DVEE − ...
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... I2C_ADDR0 22, 76 DVEE 23 PP_CH0 24 PP_CH1 PIN 1 ADV3000 TOP VIEW (Not to Scale Figure 3. Pin Configuration 1 Type Description Power Positive Analog Supply. 3.3 V nominal. ...
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... Low Speed Common Input/Output. LS I/O Low Speed Common Input/Output. LS I/O Low Speed Common Input/Output. LS I/O Low Speed Common Input/Output. LS I/O Low Speed Input/Output. LS I/O Low Speed Input/Output. LS I/O Low Speed Input/Output. LS I/O Low Speed Input/Output. LS I/O Low Speed Input/Output. LS I/O Low Speed Input/Output. LS I/O Low Speed Input/Output. LS I/O Low Speed Input/Output. Rev Page ADV3000 ...
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... Figure 4. Test Circuit Diagram for RX Eye Diagram Figure 7. RX Eye Diagram at TP3 (Cable = 2 meters, 30 AWG) Figure 8. RX Eye Diagram at TP3 (Cable = 20 meters, 24 AWG) Rev Page − 1, data rate = 2.25 Gbps, unless ADV3000 SERIAL DATA EVALUATION ANALYZER BOARD SMA COAX CABLE TP3 0 ...
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... TP1 TP2 Figure 9. Test Circuit Diagram for TX Eye Diagrams Figure 12. TX Eye Diagram at TP3 (Cable = 2 meters, 30 AWG) Figure 13. TX Diagram at TP3 (Cable = 10 meters, 28 AWG) Rev Page ADV3000 7 − 1, data rate = 2.25 Gbps, unless HDMI CABLE SERIAL DATA ANALYZER TP3 ...
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... ADV3000 T = 27°C, AVCC = 3.3 V, VTTI = 3.3 V, VTTO = 3.3 V, DVCC = 3.3 V, AMUXVCC = 5 V, AVEE = 0 V, DVEE = 0 V, differential input A swing = 1000 mV, TMDS outputs terminated with external 50 Ω resistors to 3.3 V, pattern = PRBS 2 otherwise noted. 0.6 2m CABLE = 30AWG 5m TO 20m CABLES = 24AWG 0.5 0.4 0.3 1.65Gbps EQ = 6dB 2.25Gbps 0 6dB 0 ...
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... Figure 24. Differential Input Termination Resistance vs. Temperature 60 80 100 Rev Page − 1, data rate = 2.25 Gbps, unless DJ (p-p) RJ (rms) 0 2.5 2.7 2.9 3.1 3.3 INPUT COMMON-MODE VOLTAGE (V) Figure 23. Jitter vs. Input Common-Mode Voltage –40 – TEMPERATURE (°C) ADV3000 3.5 3.7 80 100 ...
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... PP_EQ pin of the parallel control interface. No specific cable length is suggested for a particular equalization setting because cable performance varies widely between manufacturers; however, in general, the equalization of the ADV3000 can be set without degrading the signal integrity, even for short input cables. At the 12 dB setting, the ADV3000 can equalize more than 20 meters of 24 AWG cable at 2 ...
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... EDID devices may need to be available via the DDC bus, regard- less of the state of the ADV3000 and any downstream circuit. For this configuration, the auxiliary inputs of the powered down ADV3000 need high impedance state to avoid pulling down on the DDC lines and preventing these other devices from using the bus. ...
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... ADV3000 register set correspond to the state of the parallel interface configuration registers, as listed in Table 18. The ADV3000 can be controlled through the parallel control interface until the first serial control event occurs. As soon as any serial control event occurs, the serial ...
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... SWITCH There is a delay between when a user tion registers of the ADV3000 and when that state change take physical effect. This update delay occurs regardless of whether the user programs the ADV3000 via the serial or the parallel control interface. When using the serial control interface, the update delay begins at the falling edge of I2C_SCL for the last data bit transferred, as shown in Figure 29 ...
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... Table 1. Setting these pins updates the parallel control interface registers, as listed in Table 18. Following a reset, the ADV3000 can be controlled through the parallel control interface until the first serial control event occurs. As soon as any serial control event ...
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... SERIAL INTERFACE CONFIGURATION REGISTERS The serial interface configuration registers can be read and written using the I The least significant bit of the ADV3000 I the serial control interface is used, the parallel control interface is disabled until the ADV3000 is reset as described in the Serial Control Interface section. 2 Table 5 ...
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... ADV3000 AUXILIARY DEVICE MODES REGISTER AUX_EN: Auxiliary (Low Speed) Switch Enable Bit Table 8. AUX_EN Description AUX_EN Description 0 Auxiliary switch off, no low speed input/output to low speed common input/output connection 1 Auxiliary switch on AUX_CH[1:0]: Auxiliary (Low Speed) Switch Source Select Bus Table 9. AUX_CH Mapping ...
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... The auxiliary (low speed) switch is always enabled when using the parallel interface. PP_CH[1:0]: Auxiliary Switch Source Select Bus Table 21. Auxiliary Switch Mode Mapping PP_CH[1: Rev Page ADV3000 Bit 1 Bit 0 High speed source select PP_CH[1] PP_CH[0] Auxiliary switch source select PP_CH[1] PP_CH[0] Input termination ...
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... ADV3000 RECEIVER SETTINGS REGISTER High speed (TMDS) channels input termination is fixed to on when using the parallel interface. INPUT TERMINATION PULSE REGISTER 1 AND REGISTER 2 High speed input (TMDS) channels pulse-on-source switching fixed to off when using the parallel interface. RECEIVE EQUALIZER REGISTER 1 AND REGISTER 2 ...
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... APPLICATION INFORMATION Figure 31. Layout of the TMDS Traces on the ADV3000 Evaluation Board (Only Top Signal Routing Layer is Shown) The ADV3000 is an HDMI/DVI switch, featuring equalized TMDS inputs and pre-emphasized TMDS outputs intended for use as a 3:1 switch in systems with long cable runs on both the input and/or the output, and is fully HDMI 1 ...
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... PCB layout. Regardless of the data being carried on a specific TMDS channel, or whether the TMDS line is at the input or the output of the ADV3000, all four high speed signals should be routed on a PCB in accordance with the same RF layout guidelines. ...
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... Ground Current Return In some applications, it can be necessary to invert the output pin order of the ADV3000. This requires a designer to route the TMDS traces on multiple layers of the PCB. When routing differential pairs on multiple layers also necessary to reroute the corresponding reference plane to provide one continuous ground current return path for the differential signals ...
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... SDA and SCL (serial data and serial clock, respectively). These four signals can be switched through the auxiliary bus of the ADV3000 and do not need to be routed with the same strict considerations as the high speed TMDS signals. In general sufficient to route each auxiliary signal as a single-ended trace ...
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... RECOMMENDED NOT RECOMMENDED Figure 34. Recommended Pad Outline for Bypass Capacitors In applications where the ADV3000 is powered by a single 3.3 V supply recommended to use two reference supply planes and bypass the 3.3 V reference plane to the ground reference plane with one 220 pF, one 1000 pF, two 0.01 μF, and one 4.7 μF capacitors ...
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... ADV3000 OUTLINE DIMENSIONS 1.45 1.40 1.35 0.15 SEATING 0.05 PLANE VIEW A ROTATED 90° CCW ORDERING GUIDE Model Temperature Range 1 ADV3000ASTZ −40°C to +85°C 1 ADV3000ASTZ-RL −40°C to +85°C 1 ADV3000-EVALZ RoHS Compliant Part. 16.20 16.00 SQ 0.75 1.60 15.80 0.60 MAX 0. PIN 1 TOP VIEW (PINS DOWN) 0.20 0.09 7° 3.5° 20 0° 21 0.10 COPLANARITY VIEW A 0 ...
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... NOTES Rev Page ADV3000 ...
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... ADV3000 NOTES ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06712-0-8/07(0) Rev Page ...