EM78156EAS EMC [ELAN Microelectronics Corp], EM78156EAS Datasheet - Page 25

• Manufacturer Part Number: EM78156EAS
• Description: 8-Bit Microcontroller with MASK ROM
• Manufacturer: EMC [ELAN Microelectronics Corp]

Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
/IRQn
VCC
/RESET
Any pin configured as output or P60 pin configured as /INT is excluded from this
function. The Port 6 Input Status Changed Interrupt can wake up the EM78156E from
the sleep mode if Port 6 is enabled prior to going into the sleep mode by executing
SLEP. When the chip wakes-up, the controller will continue to execute the succeeding
address if the global interrupt is disabled or branch to the interrupt vector 008H if the
global interrupt is enabled.
RF is the interrupt status register that records the interrupt requests in the relative
flags/bits. IOCF is an interrupt mask register. The global interrupt is enabled by the
ENI instruction and is disabled by the DISI instruction. When one of the interrupts
(enabled) occurs, the next instruction will be fetched from address 008H. Once in the
interrupt service routine, the source of an interrupt can be determined by polling the flag
bits in RF. The interrupt flag bit must be cleared by instructions before leaving the
interrupt service routine and before interrupts are enabled to avoid recursive interrupts.
The flag (except ICIF bit) in the Interrupt Status Register (RF) is set regardless of the
status of its mask bit or the execution of ENI. Note that the outcome of RF will be the
logic AND of RF and IOCF (refer to Fig. 10). The RETI instruction ends the interrupt
routine and enables the global interrupt (the execution of ENI).
When an interrupt is generated by the INT instruction (enabled), the next instruction will
be fetched from address 001H.
D
RF
CLK
P
R
C
L
Q
Q
_
Fig. 10 Interrupt Input Circuit
IOCF
Q
Q
_
IOCFRD
RFWR
R
C
P
L
CLK
D
RFRD
IOCFWR
8-Bit Microcontroller with MASK ROM
IRQn
IRQm
IOD
ENI/DISI
EM78156E
INT
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