EM78P468LAQ EMC [ELAN Microelectronics Corp], EM78P468LAQ Datasheet - Page 21

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EM78P468LAQ

Manufacturer Part Number
EM78P468LAQ
Description
8-BIT Microcontroller
Manufacturer
EMC [ELAN Microelectronics Corp]
Datasheet
Product Specification (V1.0) 03.15.2006
(This specification is subject to change without further notice)
4.1.14
Bit 7: Not used
Bit 6 ~ 4 (CLK2 ~ CLK0): main clock selection bits for PLL mode (code option select)
Bit 3 (IDLE) : idle mode enable bit. This bit will decide the intended mode of the SLEP
instruction.
IDLE=”0”+SLEP instruction => sleep mode
IDLE=”1”+SLEP instruction => idle mode
* NOP instruction must be added after SLEP instruction.
Example : IDLE mode : IDLE bit = “1” +SLEP instruction + NOP instruction
Bit 2,1 (BF1, 0): LCD booster frequency select bit to adjust VLCD 2,3 driving.
Bit 0 (CPUS): CPU oscillator source select, When CPUS=0, the CPU oscillator select
sub-oscillator and the main oscillator is stopped.
CLK2
Bit 7
0
0
0
0
1
--
CPUS = “0”: sub-oscillator (Fs)
CPUS = “1”: main oscillator (Fm)
CNT1EN = “1” : Enable Counter 1. Count operation start.
BF1
(Address: 0Dh)
RD/SBPCR (System, Booster and PLL Control Register)
0
0
1
1
SLEEP mode : IDLE bit = “0” +SLEP instruction + NOP instruction
CLK1
CLK2
Bit 6
X
0
0
1
1
CLK0
CLK1
Bit 5
BF0
X
0
1
0
1
0
1
0
1
CLK0
Bit 4
Main clock
Booster frequency
Fs*65/2
Fs*65/4
Fs*130
Fs*244
Fs*65
IDLE
Bit 3
Fs/16
Fs/4
Fs/8
Fs
Bit 2
BF1
Example Fs=32.768K
8-BIT Microcontroller
1.065 MHz
4.26 MHz
2.13 MHz
532 KHz
Bit 1
BF0
8 MHz
EM78P468L
CPUS
Bit 0
• 17

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