EM78P468LAQ EMC [ELAN Microelectronics Corp], EM78P468LAQ Datasheet - Page 28

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EM78P468LAQ

Manufacturer Part Number
EM78P468LAQ
Description
8-BIT Microcontroller
Manufacturer
EMC [ELAN Microelectronics Corp]
Datasheet
EM78P468L
8-BIT Microcontroller
24 •
4.2.15 IOC81/WDTCR (WDT Control Register)
Bit 6 (INT): INT enable flag, this bit is read only
Bit 5 (TS): TCC signal source
Bit 4 (TE): TCC signal edge
Bit 3~0 (PSRE,TCCP2 ~ TCCP0): TCC pre-scaler bits.
Bit 7 ~ 4: Not used
Bit 3 (WDTE): watchdog timer enable. This control bit is used to enable the Watchdog
timer,
Bit 7
--
PSRE
INT_EDGE = ”1”: Interrupt on falling edge of P5.4/INT0 pin
INT = ”0”: interrupt masked by DISI or hardware interrupt
INT = “1”: interrupt enabled by ENI/RETI instructions
TS = “0”: internal instruction cycle clock
TS = “1”: transition on TCC pin, TCC period > internal instruction clock period
TE = ”0”: increment by TCC pin rising edge
TE = “1”: increment by TCC pin falling edge
WDTE = “0”: Disable WDT function.
WDTE = “1”: enable WDT function.
(Address: 08h, Bit 0 of R5 = “1”)
0
1
1
1
1
1
1
1
1
Bit 6
--
TCCP2
Bit 5
X
0
0
0
0
1
1
1
1
--
Bit 4
--
(This specification is subject to change without further notice)
TCCP1
X
0
0
1
1
0
0
1
1
WDTE
Bit 3
Product Specification (V1.0) 03.15.2006
WDTP2
TCCP0
Bit 2
X
0
1
0
1
0
1
0
1
WDTP1
Bit 1
TCC rate
1:128
1:256
1:16
1:32
1:64
1:1
1:2
1:4
1:8
WDTP0
Bit 0

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