MX29LV640BXBC-90 MCNIX [Macronix International], MX29LV640BXBC-90 Datasheet
MX29LV640BXBC-90
Related parts for MX29LV640BXBC-90
MX29LV640BXBC-90 Summary of contents
Page 1
FEATURES GENERAL FEATURES • Single Power Supply Operation - 2.7 to 3.6 volt for read, erase, and program opera- tions • 8,388,608 4,194,304 x 16 switchable • Sector structure - 8KB (4KW and 64KB(32KW) x ...
Page 2
MX29LV640T/B uses a command register to manage this functionality. MXIC Flash technology reliably stores memory contents even after 100,000 erase and program cycles. The MXIC cell is designed to optimize the erase and program mechanisms. In addition, the combination of ...
Page 3
PIN CONFIGURATION 48 TSOP A15 1 A14 2 A13 3 A12 4 A11 5 A10 A19 9 A20 RESET 12 A21 RY/BY 15 A18 16 A17 ...
Page 4
Ball Easy BGA (Top View, Ball Down A13 A12 RESET A4 B4 RY/ A17 ...
Page 5
BLOCK DIAGRAM CE OE CONTROL WE INPUT WP LOGIC BYTE RESET ADDRESS LATCH A0-A21 AND BUFFER Q0-Q15 P/N:PM0920 MX29LV640T/B PROGRAM/ERASE HIGH VOLTAGE MX29LV640T/B FLASH ARRAY ARRAY SOURCE HV Y-PASS GATE PGM SENSE DATA AMPLIFIER HV PROGRAM DATA LATCH I/O BUFFER ...
Page 6
MX29LV640T SECTOR GROUP ARCHITECTURE Sector Sector Sector Address Group A21-A12 1 SA0 0000000xxx 1 SA1 0000001xxx 1 SA2 0000010xxx 1 SA3 0000011xxx 2 SA4 0000100xxx 2 SA5 0000101xxx 2 SA6 0000110xxx 2 SA7 0000111xxx 3 SA8 0001000xxx 3 SA9 0001001xxx ...
Page 7
Sector Sector Sector Address Group A21-A12 11 SA40 0101000xxx 11 SA41 0101001xxx 11 SA42 0101010xxx 11 SA43 0101011xxx 12 SA44 0101100xxx 12 SA45 0101101xxx 12 SA46 0101110xxx 12 SA47 0101111xxx 13 SA48 0110000xxx 13 SA49 0110001xxx 13 SA50 0110010xxx 13 ...
Page 8
Sector Sector Sector Address Group A21-A12 21 SA80 1010000xxx 21 SA81 1010001xxx 21 SA82 1010010xxx 21 SA83 1010011xxx 22 SA84 1010100xxx 22 SA85 1010101xxx 22 SA86 1010110xxx 22 SA87 1010111xxx 23 SA88 1011000xxx 23 SA89 1011001xxx 23 SA90 1011010xxx 23 ...
Page 9
Sector Sector Sector Address Group A21-A12 31 SA120 1111000xxx 31 SA121 1111001xxx 31 SA122 1111010xxx 31 SA123 1111011xxx 32 SA124 1111100xxx 32 SA125 1111101xxx 32 SA126 1111110xxx 33 SA127 1111111000 34 SA128 1111111001 35 SA129 1111111010 36 SA130 1111111011 37 ...
Page 10
MX29LV640B SECTOR GROUP ARCHITECTURE Sector Sector Sector Address Group A21-A12 1 SA0 0000000000 2 SA1 0000000001 3 SA2 0000000010 4 SA3 0000000011 5 SA4 0000000100 6 SA5 0000000101 7 SA6 0000000110 8 SA7 0000000111 9 SA8 0000001xxx 9 SA9 0000010xxx ...
Page 11
Sector Sector Sector Address Group A21-A12 17 SA39 0100000xxx 17 SA40 0100001xxx 17 SA41 0100010xxx 17 SA42 0100011xxx 18 SA43 0100100xxx 18 SA44 0100101xxx 18 SA45 0100110xxx 18 SA46 0100111xxx 19 SA47 0101000xxx 19 SA48 0101001xxx 19 SA49 0101010xxx 19 ...
Page 12
Sector Sector Sector Address Group A21-A12 27 SA79 1001000xxx 27 SA80 1001001xxx 27 SA81 1001010xxx 27 SA82 1001011xxx 28 SA83 1001100xxx 28 SA84 1001101xxx 28 SA85 1001110xxx 28 SA86 1001111xxx 29 SA87 1010000xxx 29 SA88 1010001xxx 29 SA89 1010010xxx 29 ...
Page 13
Sector Sector Sector Address Group A21-A12 37 SA119 1110000xxx 37 SA120 1110001xxx 37 SA121 1110010xxx 37 SA122 1110011xxx 38 SA123 1110100xxx 38 SA124 1110101xxx 38 SA125 1110110xxx 38 SA126 1110111xxx 39 SA127 1111000xxx 39 SA128 1111001xxx 39 SA129 1111010xxx 39 ...
Page 14
Table 1 BUS OPERATION (1) Operation CE Read L Write (Program/Erase) L Standby VCC±0.3V Output Disable L Reset X Sector Group Protect L (Note 2) Chip unprotect L (Note 2) Temporary Sector Group X Unprotect Legend: L=Logic LOW=V , H=Logic ...
Page 15
AUTOSELECT CODES (High Voltage Method) Operation CE OE Manufactures Code Read Device Code Silicon (Top Boot Block) ID Device Code (Bottom Boot Block) Sector Protect Verify Secured Silicon Sector Indicator Bit (Q7) Notes: 1.code=xx00h means unprotected, or code=xx01h means protected, ...
Page 16
REQUIREMENTS FOR READING ARRAY DATA To read array data from the outputs, the system must drive the CE and OE pins to VIL the power control and selects the device the output control and gates array ...
Page 17
OUTPUT DISABLE With the OE input at a logic high level (VIH), output from the devices are disabled. This will cause the output pins high impedance state. RESET OPERATION The RESET pin provides a hardware method ...
Page 18
It is also possible to determine if the chip is unprotect in the system by writing the Read Silicon ID command. Performing a read operation with A1=VIH, it will produce 00H at data outputs (Q0-Q7) for an unprotect sector. It ...
Page 19
SECURED SILICON SECTOR The MX29LV640T/B features a OTP memory region where the system may access through a command se- quence to create a permanent part identification as so called Electronic Serial Number (ESN) in the device. Once this region is ...
Page 20
FACTORY LOCKED:Secured Silicon Sector Programmed and Protected At the Factory In device with an ESN, the Secured Silicon Sector is protected when the device is shipped from the factory. The Secured Silicon Sector cannot be modified in any way. A ...
Page 21
SOFTWARE COMMAND DEFINITIONS Device operations are selected by writing specific ad- dress and data sequences into the command register. Writing incorrect address and data values or writing them in the improper sequence will reset the device to the read mode. ...
Page 22
Legend: X=Don't care RA=Address of the memory location to be read. RD=Data read from location RA during read operation. PA=Address of the memory location to be programmed. Addresses are latched on the falling edge of the pulse, ...
Page 23
READING ARRAY DATA The device is automatically set to reading array data after device power-up. No commands are required to retrieve data. The device is also ready to read array data after completing an Automatic Program or Automatic Erase algorithm. ...
Page 24
A bit cannot be programmed from a "0" back to a "1". Attempting may halt the operation and set Q5 to "1" ,” or cause the Data Polling algorithm to indicate the operation was successful. ...
Page 25
SECTOR ERASE COMMANDS The Automatic Sector Erase does not require the device to be entirely pre-programmed prior to executing the Automatic Set-up Sector Erase command and Automatic Sector Erase command. Upon executing the Automatic Sector Erase command, the device will ...
Page 26
Table 4-1. CFI mode: Identification Data Values (All values in these tables are in hexadecimal) Description Query-unique ASCII string "QRY" Primary vendor command set and control interface ID code Address for primary algorithm extended query table Alternate vendor command set ...
Page 27
Number of erase block regions Erase block region 1 information [2E,2D blocks in region -1 [30, 2F] = size in multiples of 256-bytes Erase Block Region 2 Information (refer to CFI publication 100) Erase Block Region 3 ...
Page 28
WRITE OPERATION STATUS The device provides several bits to determine the status of a write operation: Q2, Q3, Q5, Q6, Q7, and RY/BY. Table 10 and the following subsections describe the func- tions of these bits. Q7, RY/BY, and Q6 ...
Page 29
Q7: Data Polling The Data Polling bit, Q7, indicates to the host system whether an Automatic Algorithm is in progress or com- pleted, or whether the device is in Erase Suspend. Data Polling is valid after the rising edge of ...
Page 30
But Q2 cannot distinguish whether the sector is actively erasing or is erase-suspended. Q6, by com- parison, indicates whether the device is actively eras- ing Erase Suspend, but cannot distinguish which sectors are selected for erasure. ...
Page 31
high ("1") the internally controlled erase cycle has begun; attempts to write subsequent commands to the device will be ignored until the erase operation is completed as indicated by Data Polling or Toggle Bit. If ...
Page 32
ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . ..... -65 Ambient Temperature with Power Applied .... ...
Page 33
DC CHARACTERISTICS TA=-40° ° ° ° ° 85° ° ° ° ° C, VCC=2.7V~3.6V Para- meter Description I LI Input Load Current (Note 1) I LIT A9 Input Leakage Current I LO Output Leakage Current ICC1 VCC Active ...
Page 34
SWITCHING TEST CIRCUITS DEVICE UNDER TEST CL 6.2K ohm KEY TO SWITCHING WAVEFORMS WAVEFORM INPUTS Don't Care, Any Change Permitted Does Not Apply SWITCHING TEST WAVEFORMS 3.0V 0.0V INPUT P/N:PM0920 MX29LV640T/B TEST SPECIFICATIONS Test Condition Output Load 2.7K ohm Output ...
Page 35
AC CHARACTERISTICS Read-Only Operations TA=-40° ° ° ° ° 85° ° ° ° ° C, VCC=2.7V~3.6V Parameter Std. Description tRC Read Cycle Time (Note 1) tACC Address to Output Delay tCE Chip Enable to Output Delay tOE Output ...
Page 36
Fig 1. COMMAND WRITE OPERATION VCC 5V VIH Addresses VIL tAS VIH WE VIL tOES CE VIH VIL tCS OE VIH VIL VIH Data VIL READ/RESET OPERATION Fig 2. READ TIMING WAVEFORMS VIH Addresses VIL VIH CE VIL VIH WE ...
Page 37
AC CHARACTERISTICS Parameter Description tREADY1 RESET PIN Low (During Automatic Algorithms) to Read or Write (See Note) tREADY2 RESET PIN Low (NOT During Automatic Algorithms) to Read or Write (See Note) tRP RESET Pulse Width (NOT During Automatic Algorithms) tRH ...
Page 38
ERASE/PROGRAM OPERATION Fig 4. AUTOMATIC CHIP/SECTOR ERASE TIMING WAVEFORM Erase Command Sequence(last two cycle) tWC 2AAh Address CE OE tWP WE tCS tDS tDH Data RY/BY tVCS VCC NOTES: 1.SA=sector address(for Sector Erase), VA=Valid Address for reading status data(see "Write ...
Page 39
Fig 5. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART P/N:PM0920 MX29LV640T/B START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 10H Address 555H ...
Page 40
Fig 6. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART P/N:PM0920 MX29LV640T/B START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 30H Sector Address ...
Page 41
Fig 7. ERASE SUSPEND/RESUME FLOWCHART P/N:PM0920 MX29LV640T/B START Write Data B0H ERASE SUSPEND NO Toggle Bit checking Q6 not toggled YES Read Array or Program Reading or NO Programming End YES Write Data 30H ERASE RESUME Continue Erase Another NO ...
Page 42
Fig 8. SECURED SILICON SECTOR PROTECTED ALGORITHMS FLOWCHART Device Failed P/N:PM0920 MX29LV640T/B START Enter Secured Silicon Sector Wait 1us First Wait Cycle Data=60h Second Wait Cycle Data=60h A6=0, A1=1, A0=0 Wait 300us No Data = 01h ? Yes Write Reset ...
Page 43
AC CHARACTERISTICS Erase and Program Operations Parameter Std. Description tWC Write Cycle Time (Note 1) tAS Address Setup Time tASO Address Setup Time to OE low during toggle bit polling tAH Address Hold Time tAHT Address Hold Time From CE ...
Page 44
Fig 9. AUTOMATIC PROGRAM TIMING WAVEFORMS Program Command Sequence(last two cycle) tWC XXXh Address CE OE tWP WE tCS tDS tDH Data RY/BY tVCS VCC NOTES: 1.PA=Program Address, PD=Program Data, DOUT is the true data the program address P/N:PM0920 MX29LV640T/B ...
Page 45
AC CHARACTERISTICS Alternate CE Controlled Erase and Program Operations Parameter Std. Description tWC Write Cycle Time (Note 1) tAS Address Setup Time tAH Address Hold Time tDS Data Setup Time tDH Data Hold Time tGHEL Read Recovery Time Before Write ...
Page 46
Fig 10. CE CONTROLLED PROGRAM TIMING WAVEFORM 555 for program 2AA for erase Address tWC tWH WE tGHEL OE tCP CE tWS tDS Data tRH RESET RY/BY NOTES: 1.PA=Program Address, PD=Program Data, DOUT=Data Out, Q7=complement of data written to device. ...
Page 47
Fig 11. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART Increment Address P/N:PM0920 MX29LV640T/B START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data A0H Address 555H Write Program Data/Address Data Poll from system No Verify Word Ok ? YES No ...
Page 48
SECTOR GROUP PROTECT/CHIP UNPROTECT Fig 12. Sector Group Protect / Chip Unprotect Waveform (RESET Control) VID VIH RESET SA, A6 A1, A0 Sector Group Protect or Chip Unprotect Data 60h 1us Note: For sector group protect A6=0, ...
Page 49
Fig 13. IN-SYSTEM SECTOR GROUP PROTECT/CHIP UNPROTECT ALGORITHMS WITH RESET=VID START PLSCNT=1 RESET=VID Wait 1us No First Write Temporary Sector Unprotect Mode Cycle=60h? Yes Set up sector address Sector Protect: Write 60h to sector address with A6=0, A1=1, A0=0 Wait ...
Page 50
AC CHARACTERISTICS Parameter Description tVLHT Voltage transition time tWPP1 Write pulse width for sector group protect tOESP OE setup time to WE active Fig 14. SECTOR GROUP PROTECT TIMING WAVEFORM (A9, OE Control 12V 3V A9 tVLHT 12V ...
Page 51
Fig 15. SECTOR GROUP PROTECTION ALGORITHM (A9, OE Control) No PLSCNT=32? Yes Device Failed P/N:PM0920 MX29LV640T/B START Set Up Sector Addr PLSCNT=1 OE=VID,A9=VID,CE=VIL A6=VIL Activate WE Pulse Time Out 150us Set WE=VIH, CE=OE=VIL A9 should remain VID Read from Sector ...
Page 52
Fig 16. CHIP UNPROTECT TIMING WAVEFORM (A9, OE Control) A1 12V 3V A9 tVLHT A6 12V 3V OE tVLHT WE CE Data P/N:PM0920 MX29LV640T/B tVLHT tWPP 2 tOESP 52 Verify 00H F0H tOE REV. 1.2, NOV. 05, 2003 ...
Page 53
Fig 17. CHIP UNPROTECT FLOWCHART (A9, OE Control) Increment Sector Addr * It is recommended before unprotect whole chip, all sectors should be protected in advance. P/N:PM0920 MX29LV640T/B START Protect All Sectors PLSCNT=1 Set OE=A9=VID CE=VIL,A6=1 Activate WE Pulse Time ...
Page 54
AC CHARACTERISTICS Parameter Description tVIDR VID Rise and Fall Time (see Note) tRSP RESET Setup Time for Temporary Sector Unprotect tRRB RESET Hold Time from RY/BY High for Temporary Sector Group Unprotect Fig 18. TEMPORARY SECTOR GROUP UNPROTECT WAVEFORMS 12V ...
Page 55
Fig 19. TEMPORARY SECTOR GROUP UNPROTECT FLOWCHART Temporary Sector Unprotect Completed(Note 2) Note : 1. All protected sectors are temporary unprotected. P/N:PM0920 MX29LV640T/B Start RESET = VID (Note 1) Perform Erase or Program Operation Operation Completed RESET = VIH VID=11.5V~12.5V ...
Page 56
Fig 20. SILICON ID READ TIMING WAVEFORM VCC 3V VID ADD VIH A9 VIL VIH ADD A0 VIL tACC A1 VIH VIL VIH ADD VIL CE VIH VIL tCE VIH WE VIL VIH OE VIL VIH DATA VIL Q0-Q15 P/N:PM0920 ...
Page 57
WRITE OPERATION STATUS Fig 21. DATA POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) tRC Address VA tACC tCE CE tCH tOE OE tOEH WE Q7 Q0-Q6 tBUSY RY/BY NOTES: VA=Valid address. Figure shows are first status cycle after command sequence, last ...
Page 58
Fig 22. DATA POLLING ALGORITHM No Notes: 1.VA=valid address for programming. 2.Q7 should be rechecked even Q5="1" because Q7 may change simultaneously with Q5. P/N:PM0920 MX29LV640T/B Start Read Q7~Q0 Add.=VA(1) Yes Q7 = Data ? ...
Page 59
Fig 23. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) tRC Address VA tACC tCE CE tCH tOE OE tOEH WE tDH Q6/Q2 Valid Status RY/BY NOTES: VA=Valid address; not required for Q6. Figure shows first two status cycle after command ...
Page 60
Fig 24. TOGGLE BIT ALGORITHM NO Note: 1. Read toggle bit twice to determine whether or not it is toggling. 2. Recheck toggle bit because it may stop toggling as Q5 changes to "1". P/N:PM0920 MX29LV640T/B START Read Q7~Q0 Read ...
Page 61
Fig 25. Q6 versus Q2 Enter Embedded Erase Erasing Suspend Erase NOTES: The system can use toggle Q2/Q6, Q2 toggles only when read at an address within an erase-suspended P/N:PM0920 MX29LV640T/B Enter Erase ...
Page 62
ERASE AND PROGRAMMING PERFORMANCE (1) PARAMETER Sector Erase Time Chip Erase Time Byte Programming Time Word Programming Time Chip Programming Time Erase/Program Cycles Note: 1. Not 100% Tested, Excludes external system level over head. 2. Typical program and erase times ...
Page 63
... ORDERING INFORMATION PLASTIC PACKAGE PART NO. ACCESS TIME (ns) MX29LV640TTC-90 90 MX29LV640TTC-12 120 MX29LV640BTC-90 90 MX29LV640BTC-12 120 MX29LV640TTI-90 90 MX29LV640TTI-12 120 MX29LV640BTI-90 90 MX29LV640BTI-12 120 MX29LV640TXBC-90 90 MX29LV640TXBC-12 120 MX29LV640BXBC-90 90 MX29LV640BXBC-12 120 MX29LV640TXBI-90 90 MX29LV640TXBI-12 120 MX29LV640BXBI-90 90 MX29LV640BXBI-12 120 MX29LV640TXEC-90 90 MX29LV640TXEC-12 120 MX29LV640BXEC-90 90 MX29LV640BXEC-12 120 MX29LV640TXEI-90 90 MX29LV640TXEI-12 120 MX29LV640BXEI-90 ...
Page 64
PART NO. ACCESS TIME (ns) MX29LV640TTC-90G 90 MX29LV640TTC-12G 120 MX29LV640BTC-90G 90 MX29LV640BTC-12G 120 MX29LV640TTI-90G 90 MX29LV640TTI-12G 120 MX29LV640BTI-90G 90 MX29LV640BTI-12G 120 P/N:PM0920 MX29LV640T/B Ball Pitch/ PACKAGE Ball size 48 Pin TSOP (Normal Type) 48 Pin TSOP (Normal Type) 48 Pin ...
Page 65
PACKAGE INFORMATION P/N:PM0920 MX29LV640T/B 65 REV. 1.2, NOV. 05, 2003 ...
Page 66
P/N:PM0920 MX29LV640T/B 66 REV. 1.2, NOV. 05, 2003 ...
Page 67
P/N:PM0920 MX29LV640T/B 67 REV. 1.2, NOV. 05, 2003 ...
Page 68
P/N:PM0920 MX29LV640T/B 68 REV. 1.2, NOV. 05, 2003 ...
Page 69
REVISION HISTORY Revision No. Description 1 modified the max. ICC current from 5uA to 15uA 2. To added 63CSP with 0.4mm ball size package information 1 corrected CFI code in table 4-3 device geometry data values ...
Page 70
M I ACRONIX NTERNATIONAL HEADQUARTERS: TEL:+886-3-578-6688 FAX:+886-3-563-2888 EUROPE OFFICE: TEL:+32-2-456-8020 FAX:+32-2-456-8021 JAPAN OFFICE: TEL:+81-44-246-9100 FAX:+81-44-246-9105 SINGAPORE OFFICE: TEL:+65-348-8385 FAX:+65-348-8096 TAIPEI OFFICE: TEL:+886-2-2509-3300 FAX:+886-2-2509-2200 ACRONIX MERICA, NC. TEL:+1-408-453-8088 FAX:+1-408-453-8488 CHICAGO OFFICE: TEL:+1-847-963-1900 FAX:+1-847-963-1909 http : //www.macronix.com MX29LV640T/B C ...