IW4516 ETC [List of Unclassifed Manufacturers], IW4516 Datasheet

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IW4516

Manufacturer Part Number
IW4516
Description
Presettable Up/Down Counter High-Voltage Silicon-Gate CMOS
Manufacturer
ETC [List of Unclassifed Manufacturers]
Datasheet
Presettable Up/Down Counter
High-Voltage Silicon-Gate CMOS
four synchronously clocked D-type flip-flops (with a gating structure to
provide T-type flip-flop capability) connected as counters. This
counter can be cleared by a high level on the RESET line, and can be
preset to any binary number present on the jam inputs by a high level
on the PRESET ENABLE line.
down on each positive-going clock transition. Synchronous cascading
is accomplished by connecting all clock inputs in parallel and
connecting the CARRY-OUT of a less significant stage to the
CARRY-IN of a more significant stage.
the CARRY-OUT to the clock of the next stage. If the UP/DOWN
input changes during a terminal count, the CARRY-OUT must be
gated with the clock, and the UP/DOWN input must change while the
clock is high. This method provides a clean clock signal to the
subsequent counting stage.
The IW4516B Presettable Binary Up/Down Counter consists of
If the CARRY-IN input is held low, the counter advances up or
The IW4516B can be cascaded in the ripple mode by connecting
Operating Voltage Range: 3.0 to 18 V
Maximum input current of 1 A at 18 V over full package-
temperature range; 100 nA at 18 V and 25 C
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
LOGIC DIAGRAM
PIN 8= GND
PIN 16=V
CC
CL CI
X
X
X
X = don’t care
T
H
X
X
L
L
A
FUNCTION TABLE
ORDERING INFORMATION
= -55 to 125 C for all packages
PIN ASSIGNMENT
Inputs
TECHNICAL DATA
U/D PE R
X
H
X
X
L
IW4516BN Plastic
IW4516BD SOIC
IW4516B
H
X
L
L
L
H
L NO COUNT
L
L
L
COUNT UP
PRESET
COUNT
Outputs
DOWN
RESET
Mode
157

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IW4516 Summary of contents

Page 1

... CARRY-OUT of a less significant stage to the CARRY- more significant stage. The IW4516B can be cascaded in the ripple mode by connecting the CARRY-OUT to the clock of the next stage. If the UP/DOWN input changes during a terminal count, the CARRY-OUT must be gated with the clock, and the UP/DOWN input must change while the clock is high ...

Page 2

... IW4516B * MAXIMUM RATINGS Symbol V DC Supply Voltage (Referenced to GND Input Voltage (Referenced to GND Output Voltage (Referenced to GND) OUT I DC Input Current, per Pin IN P Power Dissipation in Still Air, Plastic DIP Power Dissipation per Output Transistor D Tstg Storage Temperature ...

Page 3

... GND GND =0 GND =2 =4 =13 IW4516B Guaranteed Limit Unit - 125 C 3.5 3.5 3 1.5 1.5 1 4.95 4.95 4.95 V 9.95 9.95 9.95 14.95 14.95 14.95 0.05 0.05 0.05 V 0.05 0.05 0.05 0.05 0.05 0.05 ...

Page 4

... IW4516B AC ELECTRICAL CHARACTERISTICS Symbol Parameter Maximum Propagation Delay, Clock to Q PHL PLH (Figure Maximum Propagation Delay, Preset or Reset to PHL PLH Q (Figure Maximum Propagation Delay, Clock to Carry PHL PLH Out (Figure Maximum Propagation Delay, Carry In to Carry PHL ...

Page 5

... Figure 1. Switching Waveforms TIMING DIAGRAM IW4516B 161 ...

Page 6

... IW4516B 162 EXPANDED LOGIC DIAGRAM ...

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