BC41B143A-ds-001Pe CSR, BC41B143A-ds-001Pe Datasheet - Page 52

• Manufacturer Part Number: BC41B143A-ds-001Pe
• Description: Blue Core ROM
• Manufacturer: CSR

10.1.2 Single-Ended Input (RF_IN)
This is the single ended RF input from the antenna. The input presents a complex impedance that requires a
matching network between the terminal and the antenna. Starting from the substrate (chip) side, the input can be
modelled as a lossy capacitor with the bond wire to the ball grid represented as a series inductance.
The terminal is DC blocked. The DC level must not exceed (VSS_RADIO -0.3V to VDD_RADIO + 0.3V).
Note:
10.1.3 Transmit RF Power Control for Class 1 Applications (TX_PWR)
An 8-bit voltage DAC (AUX_DAC) is used to control the amplification level of the external PA for Class 1
operation. The DAC output is derived from the on chip band gap and is virtually independent of temperature and
supply voltage. The output voltage is given by:
for a load current ≤10mA (sourced from the device).
or
for no load current.
BlueCore4-ROM enables the external PA only when transmitting. Before transmitting, the chip normally ramps up
the power to the internal PA, then it ramps it down again afterwards. However, if a suitable external PA is used, it
may be possible to ramp the power externally by driving the TX_PWR pin on the PA from AUX_DAC.
BC41B143A-ds-001Pe
Both terminals must be externally DC biased to VDD_RADIO.
Equation 10.1: Output Voltage with Load Current ≤ 10mA
V
DAC
Equation 10.2: Output Voltage with No Load Current
V
DAC
=
This material is subject to CSR’s non-disclosure agreement
MIN
=
MIN
BlueCore4-ROM
⎛
⎜
⎜
⎝
⎛
⎜
⎝
3
© Cambridge Silicon Radio Limited 2005
3 .
⎛
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⎜
⎝
Figure 10.2: Circuit RF_IN
⎛
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v
3
R1
6.8Ω
C1
0.68pF
×
3 .
L1
1.5nH
CNTRL
v
Production Information
×
CNTRL
255
RF_IN
_
WORD
255
_
WORD
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⎟
⎠
,
(
VDD
⎞
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⎠
,
VDD
_
PIO
_
PIO
−
0
3 .
⎞
⎟
⎟
⎠
v
)
Device Terminal Descriptions
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Page 52 of 102