K9K1G08R0B SAMSUNG [Samsung semiconductor], K9K1G08R0B Datasheet - Page 31

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K9K1G08R0B

Manufacturer Part Number
K9K1G08R0B
Description
128M x 8 Bit NAND Flash Memory
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet

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Multi-Plane Page Program into Plane 0~3 or Plane 4~7
Multi-Plane Page Program is an extension of Page Program, which is executed for a single plane with 528 byte page registers. Since
the device is equipped with eight memory planes, activating the four sets of 528 byte page registers into plane 0~3 or plane 4~7
enables a simultaneous programming of four pages. Partial activation of four planes is also permitted.
After writing the first set of data up to 528 byte into the selected page register, Dummy Page Program command (11h) instead of
actual Page Program (10h) is inputted to finish data-loading of the current plane and move to the next plane. Since no programming
process is involved, R/B remains in Busy state for a short period of time(tDBSY). Read Status command (standard 70h or alternate
71h) may be issued to find out when the device returns to Ready state by polling the Ready/Busy status bit(I/O 6). Then the next set
of data for one of the other planes is inputted with the same command and address sequences. After inputting data for the last plane,
actual True Page Program (10h) instead of dummy Page Program command (11h) must be followed to start the programming pro-
cess. The operation of R/B and Read Status is the same as that of Page Program. Since maximum four pages into plane 0~3 or plane
4~7 are programmed simultaneously, pass/fail status is available for each page when the program operation completes. The
extended status bits (I/O1 through I/O 4) are checked by inputting the Read Multi-Plane Status Register. Status bit of I/O 0 is set to "1"
when any of the pages fails.
Multi-Plane page Program with "01h" pointer is not supported, thus prohibited.
Figure 12. Four-Plane Page Program
R/B
I/O
K9K1G08R0B
K9K1G08B0B
K9K1G08U0B
Data
input
0
~
7
80h
80h
A
0
528 Byte Data
Data Input
~ A
Block 4092
Address &
Block 4088
Plane 0
(1024 Block)
Block 0
Block 4
7
& A
9
~ A
26
11h
11h
t
DBSY
80h
80h
A
0
528 Byte Data
~ A
Data Input
Address &
Plane 1
(1024 Block)
Block 4093
Block 4089
7
Block 1
Block 5
& A
9
~ A
26
11h
11h
t
DBSY
31
80h
80h
A
0
528 Byte Data
~ A
Data Input
Address &
Block 4094
Block 4090
Plane 2
(1024 Block)
7
Block 2
Block 6
& A
9
~ A
26
11h
11h
t
DBSY
FLASH MEMORY
80h
80h
A
0
528 Byte Data
~ A
Data Input
Address &
Plane 3
(1024 Block)
Block 4095
Block 4091
7
Block 3
Block 7
& A
9
~ A
Advance
26
10h
10h
t
PROG
71h

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